The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2018

Filed:

Jan. 31, 2018
Applicant:

J-devices Corporation, Usuki-shi, Oita, JP;

Inventors:

Toshiyuki Inaoka, Nomi, JP;

Yuichiro Yoshikawa, Nomi, JP;

Atsuhiro Uratsuji, Nomi, JP;

Katsushi Yoshimitsu, Nomi, JP;

Assignee:

J-DEVICES CORPORATION, Usuki-shi, Oita, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 21/56 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4871 (2013.01); H01L 21/561 (2013.01); H01L 23/3675 (2013.01); H01L 23/5389 (2013.01); H01L 24/24 (2013.01); H01L 2224/24137 (2013.01); H01L 2924/15747 (2013.01);
Abstract

An object of the present invention is to provide a semiconductor package with which it is possible to reduce a volume of an encapsulation resin and to easily embed a resin regardless of thicknesses of semiconductor chips and a small distance between adjacent semiconductor chips, as well as to provide a thin semiconductor package with which a final product includes no support flat plate. To realize this, a semiconductor package having a structure wherein semiconductor chips are accommodated in cavity parts of a support which is formed by copper plating and includes the cavity parts is provided.


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