The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2018
Filed:
May. 13, 2014
Applicant:
Robert Bosch Gmbh, Stuttgart, DE;
Inventors:
Carolin Tolksdorf, Groembach, DE;
Ingo Martini, Fuerth, DE;
Frank Lipski, Reutlingen, DE;
Timm Hoehr, Reutlingen, DE;
Assignee:
ROBERT BOSCH GMBH, Stuttgart, DE;
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/148 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 29/407 (2013.01); H01L 29/0646 (2013.01); H01L 29/0696 (2013.01); H01L 29/1045 (2013.01); H01L 29/1087 (2013.01); H01L 29/404 (2013.01); H01L 29/4236 (2013.01); H01L 29/7813 (2013.01); H01L 29/7397 (2013.01);
Abstract
A field plate trench FET includes a substrate, a gate buried at least partly within the substrate, and a field plate disposed below the gate, both the gate and the field plate being disposed within a trench in the substrate and being surrounded by an insulator. A p-doped domain is disposed within the substrate below the trench. Also described is a semiconductor component having a substrate and a plurality of field plate trench FETs disposed within the substrate.