The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Feb. 27, 2017
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Seungkee Min, Tempe, AZ (US);

Margaret A. Szymanowski, Chandler, AZ (US);

Henry Andre Christange, Egmating, DE;

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 1/56 (2006.01); H03F 3/195 (2006.01); H03F 3/213 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0288 (2013.01); H01L 23/66 (2013.01); H03F 1/56 (2013.01); H03F 3/195 (2013.01); H03F 3/213 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6655 (2013.01); H03F 2200/222 (2013.01); H03F 2200/318 (2013.01); H03F 2200/411 (2013.01); H03F 2200/451 (2013.01);
Abstract

A multiple-stage RF amplifier and a packaged amplifier device include driver and final-stage transistors, each having a control terminal, a first current-carrying terminal, and a second current-carrying terminal. The control terminal of the final-stage transistor is electrically coupled to the first current-carrying terminal of the driver transistor. The amplifier further includes an inter-stage circuit coupled between the first current carrying terminal of the driver transistor and a voltage reference node. The inter-stage circuit includes a first inductance, a first capacitor, and a second capacitor. The first inductance and the first capacitor are coupled in series between the first current carrying terminal and the voltage reference node, with an intermediate node between the first inductance and the first capacitor. The second capacitor has a first terminal electrically coupled to the intermediate node and a second terminal electrically coupled to the voltage reference node.


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