The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Aug. 18, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Ian D. W. Melville, Highland, NY (US);

Mukta G. Farooq, Hopewell Junction, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0694 (2013.01); H01L 21/76877 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01);
Abstract

An integrated circuit (IC) structure uses a single semiconductor substrate having a first side and an opposing, second side. A first plurality of active devices are positioned on the first side of the single semiconductor substrate, and a second plurality of active devices are positioned on the opposing, second side of the single semiconductor substrate. A TSV may electrically couple active devices on either side. Use of a single semiconductor substrate with active devices on both sides reduces the number of semiconductor layers used and allows annealing without damaging BEOL interconnects during fabrication.


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