The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Aug. 10, 2016
Applicant:

Shinkawa Ltd., Tokyo, JP;

Inventors:

Makoto Takahashi, Tokyo, JP;

Akira Sato, Tokyo, JP;

Assignee:

SHINKAWA LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05B 15/00 (2006.01); G05B 19/00 (2006.01); H01L 23/00 (2006.01); H01L 21/67 (2006.01); H01L 21/68 (2006.01);
U.S. Cl.
CPC ...
H01L 24/75 (2013.01); H01L 21/67144 (2013.01); H01L 21/67259 (2013.01); H01L 21/681 (2013.01); H01L 24/81 (2013.01); H01L 2224/759 (2013.01); H01L 2224/7598 (2013.01); H01L 2224/75753 (2013.01); H01L 2224/75981 (2013.01); H01L 2224/8113 (2013.01); H01L 2224/81122 (2013.01); H01L 2224/81908 (2013.01); H01L 2224/83121 (2013.01); H01L 2224/83908 (2013.01);
Abstract

A method, which includes: a first chip-position calculation step of taking an image of an upper surface of a reference chip and an image of a lower surface of a correction chip to calculate positions of the chips; a second chip-movement step of moving the reference chip to a position, based on a displacement amount between the chips that has been calculated based on the positions of the chips, at which a distance between the chips corresponds to a predetermined offset amount, and then placing the correction chip on the suction stage; a second chip-position calculation step of taking an image of an upper surface of the correction chip, and calculating a second position of the correction chip; and a correction amount calculation step of calculating a correction amount of the predetermined offset amount based on the position of the reference chip and the second position of the correction chip.


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