The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 04, 2018
Filed:
Apr. 07, 2017
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chien-Chih Ho, Hsinchu, TW;
Chih-Ping Chao, Hsinchu, TW;
Hua-Chou Tseng, Hsinchu, TW;
Chun-Hung Chen, Xinpu Township, TW;
Chia-Yi Su, Yonghe, TW;
Alex Kalnitsky, San Francisco, CA (US);
Jye-Yen Cheng, Taichung, TW;
Harry-Hak-Lay Chuang, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
An integrated circuit includes a substrate, a first inter-layer dielectric (ILD) layer over the substrate, and a gate strip having a first width formed in the first ILD layer. A conductive strip having a second width is provided on the gate strip, with the second width being greater than the first width. The conductive strip is positioned so that the gate strip is covered and a portion of the conductive strip extends over a top surface of the first ILD adjacent the gate strip. A second ILD layer is provided over the conductive strip and the first ILD layer with a contact plug extending through the second ILD layer to provide electrical contact to the conductive strip.