The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Dec. 31, 2015
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

David W. Mendel, San Jose, CA (US);

Khong Seng Foo, Penang, MY;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5031 (2013.01);
Abstract

The present embodiments relate to regulating the supply voltage of an integrated circuit. The integrated circuit may implement a circuit design. The circuit design implementation may meet timing constraints with timing margins when operated with the integrated circuit at a nominal supply voltage level. The integrated circuit may further include a voltage identification controller. The voltage identification controller may determine a reduced voltage level based at least on the timing margins such that operating the circuit design implementation with the integrated circuit meets timing constraints. The voltage identification controller may direct a voltage regulator, which may be included in the integrated circuit or located outside the integrated circuit, to reduce the supply voltage level from the nominal supply voltage level to the reduced voltage level, thereby reducing the power consumption of the integrated circuit.


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