The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2018

Filed:

Oct. 14, 2016
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Julio C. Costa, Oak Ridge, NC (US);

David M. Shuttleworth, Greensboro, NC (US);

Michael J. Antonell, Summerfield, NC (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/373 (2006.01); H01L 27/12 (2006.01); H01L 23/48 (2006.01); H01L 21/02 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3737 (2013.01); H01L 21/0237 (2013.01); H01L 21/6835 (2013.01); H01L 23/481 (2013.01); H01L 27/1203 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of manufacture for a semiconductor device is disclosed. The method includes providing a semiconductor stack structure that includes a device terminal of a semiconductor device, and having a first surface and a buried oxide (BOX) layer attached to a wafer handle. Another step includes disposing a polymeric layer that includes a polymer and an admixture that increases thermal conductivity of the polymer onto the first surface of the semiconductor stack structure. Another step involves removing the wafer handle from the BOX layer to expose a second surface of the semiconductor stack structure, and yet another step involves removing a portion of the semiconductor stack structure to expose the device terminal.


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