The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2018

Filed:

Oct. 20, 2016
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Hidekazu Oda, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 21/822 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6656 (2013.01); H01L 21/2652 (2013.01); H01L 21/26513 (2013.01); H01L 21/8221 (2013.01); H01L 21/823412 (2013.01); H01L 21/823418 (2013.01); H01L 21/823468 (2013.01); H01L 21/823814 (2013.01); H01L 21/84 (2013.01); H01L 27/0922 (2013.01); H01L 27/1203 (2013.01); H01L 27/1207 (2013.01); H01L 29/0847 (2013.01); H01L 29/1045 (2013.01); H01L 29/6653 (2013.01); H01L 29/6659 (2013.01); H01L 29/66537 (2013.01); H01L 29/66575 (2013.01); H01L 29/66598 (2013.01); H01L 29/66772 (2013.01); H01L 29/78654 (2013.01); H01L 21/823864 (2013.01); H01L 29/665 (2013.01); H01L 29/78621 (2013.01);
Abstract

To enhance reliability and performance of a semiconductor device that has a fully-depleted SOI transistor, while a width of an offset spacer formed on side walls of a gate electrode is configured to be larger than or equal to a thickness of a semiconductor layer and smaller than or equal to a thickness of a sum total of a thickness of the semiconductor layer and a thickness of an insulation film, an impurity is ion-implanted into the semiconductor layer that is not covered by the gate electrode and the offset spacer. Thus, an extension layer formed by ion implantation of an impurity is kept from entering into a channel from a position lower than the end part of the gate electrode.


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