The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2018
Filed:
Aug. 08, 2017
Applicant:
Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;
Inventor:
Toshikazu Hanawa, Ibaraki, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/331 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 21/266 (2006.01); H01L 21/311 (2006.01); H01L 29/732 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66295 (2013.01); H01L 21/02238 (2013.01); H01L 21/02255 (2013.01); H01L 21/266 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 29/0804 (2013.01); H01L 29/1004 (2013.01); H01L 29/41708 (2013.01); H01L 29/42304 (2013.01); H01L 29/732 (2013.01);
Abstract
Provided is a method for manufacturing a semiconductor device that improves the reliability of the semiconductor device. An opening is formed in an insulating film formed over a semiconductor substrate. At that time, a mask layer for formation of the opening is formed over the insulating film. The insulating film is dry etched and then wet etched. The dry etching step is finished before the semiconductor substrate is exposed at the bottom of the opening, and the wet etching step is finished after the semiconductor substrate is exposed at the bottom of the opening.