The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2018
Filed:
Aug. 25, 2016
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Huang Liu, Mechanicville, NY (US);
Sarasvathi Thangaraju, Malta, NY (US);
Chun Yu Wong, Ballston Lake, NY (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/486 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/49827 (2013.01); H01L 23/49894 (2013.01); H01L 25/072 (2013.01); H01L 2924/0002 (2013.01);
Abstract
Aspects of the present invention generally relate to approaches for forming a semiconductor device such as a TSV device having a 'buffer zone' or gap layer between the TSV and transistor(s). The gap layer is typically filled with a low stress, thin film fill material that controls stresses and crack formation on the devices. Further, the gap layer ensures a certain spatial distance between TSVs and transistors to reduce the adverse effects of temperature excursion.