The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2018
Filed:
Mar. 12, 2017
Yuri Postolov, Afula, IL;
Menachem Regensburger, Shimshit, IL;
Yuri Postolov, Afula, IL;
Menachem Regensburger, Shimshit, IL;
CAMTEK LTD., Migdal Haemeq, IL;
Abstract
A method for inspecting a group of dies of a wafer, wherein the wafer comprises a group of wafer segments, wherein each wafer segment comprises a die of the group of dies, a molded material that surrounds the die and redistribution layer (RDL) conductors that are coupled to the die and are positioned above the die and the molded material, wherein the method includes the steps of: receiving design information about the RDL conductors of each wafer segment of the group of wafer segments; obtaining, during a setup process, first images of the group of wafer segments; wherein the obtaining of the first images comprises illuminating the group of wafer segments with radiation and detecting radiation scattered or reflected from the group of wafer segments as a result of the illuminating; generating reference information based on the design information about the RDL conductors of one or more wafer segments of the group of wafer segments and at least one first image of the one or more first images; acquiring, during an inspection process, a second image of each wafer segment of the group of wafer segments; and evaluating each wafer segment of the group of wafer segments based on the second image of the wafer segment and the reference information of the wafer segment.