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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10038091 B1

PDFFull Text
Date of Patent:
Jul. 31, 2018

Filed:

Jun. 30, 2016

Semiconductor device and method

Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Christian Schippel, Dresden, DE;

Alban Zaka, Dresden, DE;

Ignasi Cortes Mayol, Dresden, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:

Amerson Law Firm, PLLC

Primary Examiner:

Hrayr A Sayadian

Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 29/167 (2006.01); H01L 29/06 (2006.01); H01L 29/45 (2006.01); H01L 21/265 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7824 (2013.01); H01L 21/26513 (2013.01); H01L 21/76224 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/1079 (2013.01); H01L 29/167 (2013.01); H01L 29/45 (2013.01); H01L 29/66681 (2013.01);
Abstract

The present disclosure provides a semiconductor device including a substrate, a first well and a second well formed in the substrate, the first well being doped with dopants of a first conductivity type and the second well being doped with dopants of a second conductivity type, a third well within the first well, a gate structure partially formed over the first and second wells, and a first epi region on the third well and a drain region electrically coupled to the second well, the first epi region being doped with dopants of the second conductivity type.

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Schippel, Christian. (2018). Semiconductor device and method (U.S. Patent No. 10038091). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10038091

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