The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 31, 2018
Filed:
Jun. 14, 2016
Cadence Design Systems, Inc., San Jose, CA (US);
Pawan Kulshreshtha, San Jose, CA (US);
Amit Dhuria, Cupertino, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Electronic design automation systems, methods, and media are presented for hierarchical timing analysis with multi-instance blocks. Some embodiments involve generation of a combined timing context for all instances of a multi-instance block. Such embodiments may merge timing context information with multi-mode multi-context (MMMC) views for different instances of a multi-instance block. Other embodiments involve efficient merging of instance timing contexts during block level static timing analysis. Various different embodiments involve separate or hybrid merged timing analysis based on a user selection.