The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2018

Filed:

Mar. 15, 2013
Applicant:

Avalanche Technology, Inc., Fremont, CA (US);

Inventors:

Mehdi Asnaashari, Danville, CA (US);

Siamack Nemazie, Los Altos Hills, CA (US);

Anilkumar Mandapuram, San Jose, CA (US);

Assignee:

Avalanche Technology, Inc., Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7207 (2013.01);
Abstract

A storage system includes a central processing unit (CPU) subsystem including a CPU, a physically-addressed solid state disk (SSD) that is addressable using physical addresses associated with user data, provided by the CPU, to be stored in or retrieved from the physically-addressed SSD in blocks. Further, the storage system includes a non-volatile memory module, the non-volatile memory module having flash tables used to manage blocks in the physically addressed SSD, the flash tables include tables used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD. Additionally, the storage system includes a peripheral component interconnect express (PCIe) switch coupled to the CPU subsystem and a network interface controller coupled through a PCIe bus to the PCIe switch, wherein the flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.


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