The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2018

Filed:

Sep. 19, 2016
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Prabhakar Kushwaha, Delhi, IN;

Poonam Aggrwal, Delhi, IN;

Rajkumar Agrawal, Noida, IN;

Prabhjot Singh, Noida, IN;

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01); G06F 1/08 (2006.01); G06F 15/78 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4403 (2013.01); G06F 1/08 (2013.01); G06F 12/0246 (2013.01); G06F 15/7821 (2013.01); G06F 15/7853 (2013.01);
Abstract

A system-on-chip includes a processing core and a memory controller connected between the core and an external memory. A clock divider receives an internal clock signal and outputs a divided clock signal. The memory controller uses the divided clock signal to establish an interface communication frequency with the memory. A boot control logic circuit, connected to the clock divider, compares a check data pattern to a predefined data pattern read from the memory by the memory controller at the interface frequency. When the predefined and check data patterns do not match, the boot control logic circuit instructs the clock divider to adjust the divided clock signal to change the interface frequency, after which the predefined data pattern reading and comparison are repeated, and when the predefined and check data patterns match, the memory controller reads a boot program, executed by the core, from the memory at the interface frequency.


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