The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2018

Filed:

Sep. 23, 2011
Applicants:

Hideo Hosono, Kanagawa, JP;

Masahiro Hirano, Tokyo, JP;

Hiromichi Ota, Aichi, JP;

Toshio Kamiya, Kanagawa, JP;

Kenji Nomura, Tokyo, JP;

Inventors:

Hideo Hosono, Kanagawa, JP;

Masahiro Hirano, Tokyo, JP;

Hiromichi Ota, Aichi, JP;

Toshio Kamiya, Kanagawa, JP;

Kenji Nomura, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/26 (2006.01); H01L 29/786 (2006.01); C23C 14/00 (2006.01); C23C 14/08 (2006.01); C23C 14/28 (2006.01); C23C 14/34 (2006.01); H01L 21/02 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78696 (2013.01); C23C 14/0021 (2013.01); C23C 14/086 (2013.01); C23C 14/28 (2013.01); C23C 14/3414 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01); H01L 21/02631 (2013.01); H01L 27/1225 (2013.01); H01L 29/7869 (2013.01); H01L 29/78693 (2013.01);
Abstract

A switching element of LCDs or organic EL displays which uses a thin film transistor device, includes: a drain electrode, a source electrode, a channel layer contacting the drain electrode and the source electrode, wherein the channel layer comprises indium-gallium-zinc oxide having a transparent, amorphous state of a composition equivalent to InGaO(ZnO)(wherein m is a natural number less than 6) in a crystallized state, and the channel layer has a semi-insulating property represented by an electron mobility of more than 1 cm/(V·sec) and an electron carrier concentration is less than 10/cm, a gate electrode, and a gate insulating film positioned between the gate electrode and the channel layer.


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