The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2018

Filed:

Mar. 31, 2016
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Vishnu Kumar, Uttar Pradesh, IN;

Manuj Verma, Uttar Pradesh, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5031 (2013.01); G06F 17/5036 (2013.01);
Abstract

The present disclosure relates to a system and method for performing Path-Based Analysis (PBA) of an electronic circuit design. Embodiments may include receiving a command to create a spice deck of a timing path associated with the electronic circuit design. In response to receiving the command, embodiments may further include initiating PBA for the timing path and identifying one or more stages within the timing path. Embodiments may also include performing a delay calculation for each of the one or more stages and generating a stage spice deck for each of the one or more stages based upon, at least in part, information from the delay calculation, wherein the stage spice deck encapsulates all elements of the stage. Embodiments may further include connecting the stage spice deck for each of the one or more stages in series to form a complete path spice deck.


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