The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2018

Filed:

Nov. 16, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Nobuhito Kuge, Yokkaichi, JP;

Tatsuya Fujishima, Yokkaichi, JP;

Masayuki Shishido, Yokkaichi, JP;

Akira Kuramoto, Kuwana, JP;

Hideto Onuma, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 27/11556 (2017.01); H01L 27/11521 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 27/11521 (2013.01);
Abstract

A semiconductor memory device includes a stacked body including a plurality of word lines; a semiconductor layer extending through the word lines; a memory cell provided at a part where the semiconductor layer crosses one of the word lines, the memory cell including a plurality of cell layers, the cell layers including a first insulating layer; and at least one of a first structural body and a second structural body provided around the stacked body. The first structural body includes a plurality of monitor layers including same materials respectively as materials of the cell layers. The second structural body includes a first electrode, a second electrode and an insulating body positioned between the first electrode and the second electrode. The insulating body includes same material as a material of the first insulating layer, and has almost the same thickness as a thickness of the first insulating layer.


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