The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2018
Filed:
Mar. 13, 2016
Applicant:
Winbond Electronics Corporation, Zhubei, TW;
Inventors:
Valery Teper, Petach-Tikva, IL;
Uri Kaluzhny, Beit Shemesh, IL;
Assignee:
WINBOND ELECTRONICS CORPORATION, Zhubei, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 12/16 (2006.01); G06F 21/55 (2013.01); G06F 1/08 (2006.01); G09C 1/00 (2006.01); H04L 9/00 (2006.01);
U.S. Cl.
CPC ...
G06F 21/55 (2013.01); G06F 1/08 (2013.01); G09C 1/00 (2013.01); H04L 9/003 (2013.01); H04L 2209/08 (2013.01); H04L 2209/12 (2013.01);
Abstract
A system, comprising a logic circuit and delay circuitry, is described. The logic circuit is configured to perform a plurality of instances of a particular computation that is based on a plurality of inputs. The delay circuitry is configured to vary a power-consumption profile of the logic circuit over the plurality of instances, by applying, to the inputs, respective delays that vary over the instances, at least some of the delays varying independently from each other. Other embodiments are also described.