The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2018

Filed:

Dec. 19, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Vibhor Jain, Essex Junction, VT (US);

Qizhi Liu, Essex Junction, VT (US);

David L. Harame, Essex Junction, VT (US);

Renata Camillo-Castillo, Essex Junction, VT (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/737 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/165 (2006.01); H01L 29/417 (2006.01); H01L 21/265 (2006.01); H01L 29/735 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/737 (2013.01); H01L 21/26513 (2013.01); H01L 27/1203 (2013.01); H01L 29/0653 (2013.01); H01L 29/165 (2013.01); H01L 29/41708 (2013.01); H01L 29/66242 (2013.01); H01L 29/735 (2013.01);
Abstract

Device structures and fabrication methods for a bipolar junction transistor. The device structure includes an intrinsic base, an emitter having a vertical arrangement relative to the intrinsic base, and a collector having a lateral arrangement relative to the intrinsic base. The device structure may be fabricated by forming the intrinsic base and the collector in a semiconductor layer, and epitaxially growing the emitter on the intrinsic base and with a vertical arrangement relative to the intrinsic base. The collector and the intrinsic base have a lateral arrangement within the semiconductor layer.


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