The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2018

Filed:

Feb. 27, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Cheng-Wei Cheng, White Plains, NY (US);

Edward William Kiewra, South Burlington, VT (US);

Amlan Majumdar, White Plains, NY (US);

Devendra K. Sadana, Pleasantville, NY (US);

Kuen-Ting Shiu, Yorktown Heights, NY (US);

Yanning Sun, Scarsdale, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/20 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/20 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/495 (2013.01); H01L 29/4916 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/66522 (2013.01); H01L 29/78 (2013.01); H01L 21/0254 (2013.01); H01L 21/02543 (2013.01); H01L 21/02546 (2013.01); H01L 21/02549 (2013.01);
Abstract

An electrical device comprising a base semiconductor layer of a silicon including material; a dielectric layer present on the base semiconductor layer; a first III-V semiconductor material area present in a trench in the dielectric layer, wherein a via of the III-V semiconductor material extends from the trench through the dielectric layer into contact with the base semiconductor layer; a second III-V semiconductor material area present in the trench in the dielectric layer wherein the second III-V semiconductor material area does not have a via extending through the dielectric layer into contact with the base semiconductor layer; and a semiconductor device present on the second III-V semiconductor material area, wherein the first III-V semiconductor material area and the second III-V semiconductor material area are separated by a low aspect ratio trench extending to the dielectric layer.


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