The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2018
Filed:
Jun. 21, 2017
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Gottfried Beer, Nittendorf, DE;
Walter Hartner, Bad Abbach, DE;
Assignee:
INFINEON TECHNOLOGIES AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/4763 (2006.01); H01L 23/02 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 23/538 (2006.01); H01Q 23/00 (2006.01); H01Q 1/22 (2006.01); H01L 23/522 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01); H01L 25/16 (2006.01); H01L 23/31 (2006.01); H01L 25/10 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 24/82 (2013.01); H01L 21/78 (2013.01); H01L 23/5384 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/24 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01Q 1/2283 (2013.01); H01Q 23/00 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/5226 (2013.01); H01L 23/66 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/105 (2013.01); H01L 25/16 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6677 (2013.01); H01L 2223/6683 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05599 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/24195 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/451 (2013.01); H01L 2224/45015 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06551 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1301 (2013.01); H01L 2924/1423 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/207 (2013.01);
Abstract
A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.