The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2018

Filed:

Dec. 07, 2015
Applicants:

Scott P. Dubal, Beaverton, OR (US);

Eliel Louzoun, Jerusalem, IL;

Douglas Boom, Portland, OR (US);

Kent C. Lusted, Aloha, OR (US);

Ronald F. Barbee, Tigard, OR (US);

Nishantkumar Shah, Portland, OR (US);

Inventors:

Scott P. Dubal, Beaverton, OR (US);

Eliel Louzoun, Jerusalem, IL;

Douglas Boom, Portland, OR (US);

Kent C. Lusted, Aloha, OR (US);

Ronald F. Barbee, Tigard, OR (US);

Nishantkumar Shah, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 13/38 (2006.01); G06F 13/40 (2006.01); H04L 29/08 (2006.01); G06F 13/36 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 13/36 (2013.01); G06F 13/4282 (2013.01); H04L 67/10 (2013.01);
Abstract

Methods for implementing mini-mezzanine Open Compute Project (OCP) plug-and-play Network PHY Cards and associated apparatus. In accordance with one aspect, the MAC (Media Access Channel) and PHY (Physical) layer functions in one or more communication protocol stacks are split between a MAC block in a Platform Controller Hub (PCH) or processor SoC and a PHY card installed in a mezzanine slot of a platform and including one or more ports. During platform initialization operations, configuration parameters are read from the PHY card including a PHY card ID, and a corresponding configuration script is selected and executed to configure the PHY card for use in the platform. The configuration parameters are also used to enumerate PCIe devices associated with physical functions and ports supported by the PHY card.


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