The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

Dec. 26, 2017
Applicant:

Power Integrations, Inc., San Jose, CA (US);

Inventors:

Vikram Balakrishnan, Mountain View, CA (US);

Giao Minh Pham, Milpitas, CA (US);

Ricardo Luis Janezic Pregitzer, Campbell, CA (US);

Peter Vaughan, Los Gatos, CA (US);

Assignee:

Power Integrations, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/335 (2006.01); H02M 1/08 (2006.01); H02M 3/156 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33515 (2013.01); H02M 1/08 (2013.01); H02M 3/156 (2013.01); H02M 3/335 (2013.01); H02M 3/33507 (2013.01); H02M 2001/0009 (2013.01); H02M 2001/0032 (2013.01);
Abstract

A controller includes a drive circuit that generates a drive signal to switch a power switch to control a transfer of energy to of a power converter output in response to a current sense signal, a feedback signal, and a current limit signal. A current limit generator generates the current limit signal in response to a load coupled to the output. An exclusion frequency range detection circuit generates a frequency skip signal in response to the drive signal to indicate when an intended frequency of the drive signal is within an exclusion frequency window. The current limit signal is unvarying for at least a switching cycle when the intended frequency of the drive signal is within the exclusion frequency window. A first latch generates a hold signal to control the current limit generator to hold the current limit signal in response to the frequency skip signal and the feedback signal.


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