The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

May. 25, 2017
Applicant:

Ememory Technology Inc., Hsin-Chu, TW;

Inventor:

Wu-Chang Chang, Hsinchu County, TW;

Assignee:

eMemory Technology Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/02 (2006.01); G05F 1/10 (2006.01); H02M 3/07 (2006.01); G11C 5/14 (2006.01); H03K 17/687 (2006.01); H03K 3/012 (2006.01); H03K 5/159 (2006.01);
U.S. Cl.
CPC ...
H02M 3/07 (2013.01); G11C 5/145 (2013.01); G11C 5/147 (2013.01); H03K 3/012 (2013.01); H03K 17/687 (2013.01); H02M 2003/075 (2013.01); H03K 5/159 (2013.01);
Abstract

A charge pump circuit includes a first charge pump unit and a second charge pump unit. The first charge pump unit pumps an input voltage to output a first pumped voltage according to a first clock signal, a second clock signal and a third clock signal. The second charge pump unit pumps the first pumped voltage to output a second pumped voltage according to the first clock signal, a fourth clock signal and the third clock signal. The first clock signal and the third clock signal are non-overlapping clock signals. A falling edge of the second clock signal leads a rising edge of the first clock signal. A falling edge of the fourth clock signal leads a rising edge of the third clock signal.


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