The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

Sep. 29, 2015
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventor:

Daniel M. McCarthy, Phoenix, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0815 (2016.01); G06F 12/123 (2016.01); G06F 12/0844 (2016.01); G06F 12/0853 (2016.01); G06F 12/0855 (2016.01); G06F 12/128 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0815 (2013.01); G06F 12/0844 (2013.01); G06F 12/0853 (2013.01); G06F 12/0855 (2013.01); G06F 12/123 (2013.01); G06F 12/128 (2013.01); G06F 2212/621 (2013.01); G06F 2212/69 (2013.01);
Abstract

A method includes generating least-recently-used location information for a shared set-associative multi-access cache and next-to least-recently-used location information for the shared set-associative multi-access cache. The method includes concurrently accessing a shared set-associative multi-access cache in response to a first memory request from a first memory requestor and a second memory request from a second memory requestor based on the least-recently-used location information and the next-to least-recently-used location information. The method may include updating the least-recently-used location information and the next-to least-recently-used location information in response to concurrent access to the shared set-associative multi-access cache according to the first memory request and the second memory request. The method may include independently handling the first and second memory accesses concurrently in response to first and second set fields being different and cooperatively handling the first and second memory access concurrently in response to first and second set fields identifying a target set.


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