The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

Aug. 02, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Steven M. Bennett, Hillsboro, OR (US);

Andrew V. Anderson, Hillsboro, OR (US);

Gilbert Neiger, Portland, OR (US);

Dion Rodgers, Hillsboro, OR (US);

Richard A. Uhlig, Hillsboro, OR (US);

Lawrence O. Smith, Beaverton, OR (US);

Barry E. Huntley, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 9/54 (2006.01); G06F 9/48 (2006.01); G06F 9/38 (2018.01); G06F 13/24 (2006.01);
U.S. Cl.
CPC ...
G06F 9/45533 (2013.01); G06F 9/3861 (2013.01); G06F 9/4555 (2013.01); G06F 9/45545 (2013.01); G06F 9/45558 (2013.01); G06F 9/4812 (2013.01); G06F 9/542 (2013.01); G06F 13/24 (2013.01); G06F 2009/45566 (2013.01);
Abstract

Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a hardware processor including event circuit to recognize a virtualization event, and evaluation circuit to determine whether to transfer control of the apparatus from a child guest to a parent guest in response to the virtualization event, wherein the child guest and the parent guest each include a bit per virtualization event to indicate whether the parent guest is to gain control when the virtualization event occurs.


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