Applied Materials, Inc.

Nanyang Technological University

Zongbin Wang

Arvind Sundarrajan

Shalina Sudheeran

Juan Carlos Rocha-Alvarez

Jian Li

Kwangduk Douglas Lee

Paul Brillhart

Dmitry A Dzilno

Mayur G Kulkarni

Sanjay G Kamath

Bharat Bhushan

Subodh Gautam Mhaisalkar

Loke Yuen Wong

Akshay Gunaji

Lain-Jong Li

Yuanyuan Zhang

Sandeep Bindgi

Yong Xiang Lim

Yubin Zhang

Kumar Bhupendra

Exemplary semiconductor processing systems include a processing chamber, a power supply, and a chuck disposed at least partially within the processing chamber. The chuck includes a chuck body defining a vacuum port. The chuck also includes first and second coplanar electrodes embedded in the chuck body and connected to the power supply. In some examples, coplanar electrodes include concentric electrodes defining a concentric gap in between. Exemplary semiconductor processing methods may include activating the power supply for the electrostatic chuck to secure a semiconductor substrate on the body of the chuck and/or activating the vacuum port defined by the body of the electrostatic chuck. Some processing can be carried out at increased pressure, while other processing can be carried out at reduced pressure with increased chucking voltage.

Multi-pressure bipolar electrostatic chucking

Silicon oxide is deposited with improved step coverage by first exposing a patterned substrate to a silicon-containing precursor and then to an oxygen-containing precursor or vice versa. Plasma excitation is used for both precursors. Exposing the precursors one-at-a-time avoids disproportionate deposition of silicon oxide near the opening of a high aspect ratio gap on a patterned substrate. The plasma-excited precursors exhibit a lower sticking coefficient and/or higher surface diffusion rate in regions already adsorbed and therefore end up depositing silicon oxide deep within the high aspect ratio gap to achieve the improvement in step coverage.

Step coverage dielectric

Implementations described herein generally relate to methods for forming dielectric films in high aspect ratio features. In one implementation, a method for forming a silicon oxide layer is provided. A silicon-containing precursor gas is flown into a processing chamber having a substrate having a high aspect ratio feature disposed therein. Then a high frequency plasma is applied to the silicon-containing precursor gas to deposit a silicon-containing layer over the surface of the high aspect ratio feature. The processing chamber is purged to remove by-products from the silicon-containing layer deposition process. An oxygen-containing precursor gas is flown into the processing chamber. A high frequency plasma and a low frequency plasma are applied to the oxygen-containing precursor gas to form the silicon oxide layer.

Hermetic CVD-cap with improved step coverage in high aspect ratio structures

A method of patterning nanostructures comprising printing an ink comprising the nanostructures onto a solvent-extracting first surface such that a pattern of nanostructures is formed on the first surface.

Method of patterning of nanostructures

Growing community of inventors

Singapore, Singapore

Zongbin Wang