Csmc Technologies Fab1 Co., Ltd.

Csmc Technologies Fab2 Co., Ltd.

Zhongyu Lin

Meng Dai

Guangyang Wang

Yonghai Hu

Guipeng Sun

Jun Sun

An electrostatic protection device of an LDMOS silicon controlled structure comprises a P-type substrate (), an N-well () and a P-well () on the substrate, a gate electrode () overlapping on the P-well () and extending to an edge of the N-well (), a first N+ structure and a first P+ structure provided in the N-well (), and a second N+ structure and a second P+ structure provided in the P-well (), the first N+ structure being a drain electrode N+ structure (), the first N+ structure being a drain electrode N+ structure (), the first P+ structure being a drain electrode P+ structure (), the second N+ structure being a source electrode N+ structure (), the second P+ structure being a source P+ structure (), and a distance from the drain electrode P+ structure () to the gate electrode () being greater than a distance from the drain electrode N+ structure () to the gate electrode ().

Electrostatic protection device of LDMOS silicon controlled structure

An electrostatic discharge protection structure includes: substrate of a first type of conductivity, well region of a second type of conductivity, substrate contact region in the substrate and of the first type of conductivity, well contact region in the well region and of the second type of conductivity, substrate counter-doped region between the substrate contact region and the well contact region and of the second type of conductivity, well counter-doped region between the substrate contact region and the well contact region and of the first type of conductivity, communication region at a lateral junction between the substrate and the well region, first isolation region between the substrate counter-doped region and the communication region, second isolation region between the well counter-doped region and the communication region, oxide layer having one end on the first isolation region and another end on the substrate, and field plate structure on the oxide layer.

Electrostatic discharge protection structure and fabrication method thereof

A semiconductor device for electrostatic discharge protection includes a substrate, a first well and a second well formed in the substrate. The first and second wells are formed side by side, meeting at an interface, and have a first conductivity type and a second conductivity type, respectively. A first heavily doped region and a second heavily-doped region are formed in the first well. A third heavily doped region and a fourth heavily-doped region are formed in the second well. The first, second, third, and fourth heavily-doped regions have the first, second, second, and first conductivity types, respectively. Positions of the first and second heavily-doped regions are staggered along a direction parallel to the interface.

Semiconductor device for ESD protection

An SCR apparatus includes an SCR structure and a first N injection region. The SCR structure includes a P+ injection region, a P well, an N well and a first N+ injection region, the first N injection region is located under an anode terminal of the P+ injection region of the SCR structure. A method for adjusting a sustaining voltage therefor is provided as well.

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Wuxi, China

Zhongyu Lin