Nxp Usa, Inc.

Freescale Semiconductor,inc.

Nxp B.v.

Other

Zhiwei Gong

Scott M Hayes

Michael B Vincent

Wei Gao

Jason R Wright

Weng Foong Yap

Richard Te Gan

Rushik Prabhudas Tank

Douglas G Mitchell

Betty Hill-Shan Yeung

Dehong Ye

Vivek Gupta

Burton Jesse Carpenter

Glenn Graham Daves

Jianwen Xu

Kabir J Mirpuri

Navjot Chhabra

Lakshminarayan Viswanathan

Stephen Ryan Hooper

Fernando A Santos

Alan J Magnus

George R Leal

Eduard Jan Pabst

Trung Duong

Jinmei Liu

Jinbang Tang

Li Li

Elie A Maalouf

Jinzhong Yao

William H Lytle

Craig S Amrine

Vijay Sarihan

Lu Li

Walter Parmon

Kesvakumar V C Muniandy

Huchang Zhang

Jinsheng Wang

Lizabeth Ann Keser

Paul Southworth

Kabir Mirpuri

Pascal Oberndorff

Yanting Tian

Dominic Poh Meng Koey

Dominic Koey Poh Meng

Nageswara Rao Bonda

Kuan-Hsiang Mao

Neil Thomas Tracht

Li Ll

Lu Ll

A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A thermal conductive structure including a die pad portion is affixed to the semiconductor die. A limb portion of the thermal conductive structure extends laterally away from the die pad portion and overlaps a portion of the package substrate. A thermal conduction path is formed between the semiconductor die and a distal end of the limb portion.

Semiconductor device package having thermal dissipation feature and method therefor

A method of forming a semiconductor device is provided. The method includes forming a first cavity at a first major surface of a first encapsulant. A first semiconductor die is affixed on the first major surface of the first encapsulant and a second semiconductor die is affixed on a bottom surface of the first cavity. A second encapsulant encapsulates the first semiconductor die, the second semiconductor die, and at least exposed portions of the first major surface of the first encapsulant. A package substrate is formed on a first major surface of the second encapsulant. The package substrate includes conductive traces interconnected to the first semiconductor die and the second semiconductor die.

Semiconductor device with cavity carrier and method therefor

A device includes a package body including a central flange and an amplifier module mounted to the central flange of the surface-mount device. The amplifier module includes a module substrate mounted to the central flange. The module substrate includes a first die mount window, a first circuitry on a first surface of the module substrate, a second circuitry on the first surface of the module substrate, and a first amplifier die mounted on the central flange. The first amplifier die is at least partially disposed within the first die mount window and the first amplifier die is electrically connected to the first circuitry and the second circuitry. The first circuitry is electrically connected to a first lead of the package body and the second circuitry is electrically connected to a second lead of the package body.

Surface-mount amplifier devices

A method of manufacturing a packaged semiconductor device is provided. The method includes placing a plurality of semiconductor die on a carrier substrate. The plurality of semiconductor die and an exposed portion of the carrier substrate are encapsulated with an encapsulant. A cooling fixture includes a plurality of nozzles and is placed over the encapsulant. The encapsulant is cooled by way of air exiting the plurality of nozzles. A property of air exiting a first nozzle of the plurality of nozzles is different from that of a second nozzle of the plurality of nozzles.

Semiconductor device packaging warpage control

Radio frequency (RF) packages containing multilevel power substrates and associated fabrication methods are disclosed. In an embodiment, the method includes producing a multilevel substrate panel by obtaining a base panel level containing prefabricated base structures and having a surface through which metallic surfaces of the prefabricated base structures are exposed. A secondary panel level is formed on the base layer to include patterned metal features embedded in a secondary dielectric body and electrically contacting the exposed metallic surfaces of the prefabricated base structures at a direct plated interface. The presingulated array of multilevel power substrates is separated into singulated multilevel power substrates each including a base substrate level formed from a singulated piece of the base panel level and a secondary substrate level formed from a singulated piece of the secondary substrate level.

Radio frequency packages containing multilevel power substrates and associated fabrication methods

A method of tie bar removal is provided. The method includes forming a leadframe including a tie bar and a flag. The tie bar extends from a side rail of the leadframe and has a distal portion at an angle different from a plane of the flag. A semiconductor die is attached to the flag of the leadframe. A molding compound encapsulates the semiconductor die, a portion of the leadframe, and the distal portion of the tie bar. The tie bar is separated from the molding compound with an angled cavity remaining in the molding compound.

Tie bar removal for semiconductor device packaging

A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Semiconductor package thermal spreader having integrated EF/EMI shielding and antenna elements

A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A first conductive connector is affixed to a first connector pad of the package substrate. A conformal thermal conductive layer is applied on the semiconductor die and a portion of the first surface of the package substrate. The conformal thermal conductive layer is configured and arranged as a thermal conduction path between the semiconductor die and the first conductive connector.

A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.

A method of manufacturing a carrier for semiconductor device packaging is provided. The method includes forming a carrier having a plurality of plateau regions separated by a plurality of channels. The carrier is configured and arranged to support a plurality of semiconductor die during a packaging operation. The plurality of channels is filled with a material configured to control warpage of the carrier.

Semiconductor package thermal spreader having integrated RF/EMI shielding and antenna elements

A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel by placing a plurality of semiconductor die on a major side of a carrier substrate and encapsulating with an encapsulant the plurality semiconductor die and the major side of the carrier substrate. A plurality of warpage control features are formed with the encapsulant while encapsulating. The method further includes placing the panel onto a warpage control fixture to substantially flatten the panel. The plurality of warpage control features interlock with mating features of the warpage control fixture.

A semiconductor device package that incorporates a waveguide usable for high frequency applications, such as radar and millimeter wave is provided. Embodiments employ a rigid-flex printed circuit board structure that can be folded to form the waveguide while, at the same time, mounting one or more semiconductor device die or packages. Embodiments reduce both the area of the mounted package and the distance signals need to travel between the semiconductor device die and antennas associated with the waveguide.

Method, system, and apparatus for forming three-dimensional semiconductor device package with waveguide

A semiconductor device package is provided that incorporates an antenna structure within the package through use of three-dimensional additive manufacturing processes. Embodiments can provide semiconductor device packages that are thinner than traditional device packages by depositing specific metal and dielectric layers within the package in desired positions with precision that cannot be provided by other manufacturing techniques. Further, embodiments can provide antenna geometries and orientations that cannot be provided by other manufacturing techniques.

Semiconductor package with compact antenna formed using three-dimensional additive manufacturing process

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Chandler, AZ, United States of America

Zhiwei Gong