Texas Instruments Corporation

Zhi Peng Feng

Yunlong Liu

Manoj K Jain

Rui Liu

Shengpin Yang

Seetharaman Sridhar

Hong Yang

Sunglyong Kim

Ya Ping Chen

Fei Ma

Furen Lin

Jing Hu

Chao Zuo

Baoqiang Niu

Rui Song

Dongsheng Liu

In a described example, a method of forming a capacitor includes forming a doped polysilicon layer over a semiconductor substrate. The method also includes forming a dielectric layer on the doped polysilicon layer. The method also includes forming an undoped polysilicon layer on the dielectric layer.

Multi-layer polysilicon stack for semiconductor devices

A method of fabricating an integrated circuit includes etching trenches in a first surface of a semiconductor layer. A trench dielectric layer is formed over the first surface and over bottoms and sidewalls of the trenches and a doped polysilicon layer is formed over the trench dielectric layer and within the trenches. The doped polysilicon layer is patterned to form a polysilicon bridge that connects to the polysilicon within the filled trenches and a blanket implant of a first dopant is directed to the polysilicon bridge and to the first surface. The blanket implant forms a contact region extending from the first surface into the semiconductor layer.

Reduced ESR in trench capacitor

A semiconductor device, and methods of forming the same. In one example, the semiconductor device includes a trench in a substrate having a top surface, and a shield within the trench. The semiconductor device also includes a shield liner between a sidewall of the trench and the shield, and a lateral insulator over the shield contacting the shield liner. The semiconductor device also includes a gate dielectric layer on an exposed sidewall of the trench between the lateral insulator and the top surface. The lateral insulator may have a minimum thickness at least two times thicker than a maximum thickness of the gate dielectric layer.

Semiconductor device including a lateral insulator

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Sichuan, China

Zhi Peng Feng