St Assembly Test Services Inc.

Stats Chippac Pte. Ltd.

Zheng Zheng

Byung Joon Han

Jae Hak Yee

Hien Boon Tan

Byung Tai Do

Linda Pei Ee Chua

Arnel Senosa Trasporto

Jeffrey David Punzalan

Byung Hoon Ahn

Lee Sun Lim

Tan Hien Boon

Jefferey D Punzalan

A method of manufacture of an integrated circuit packaging system includes: providing a die attach pad integrally connected to a connector portion and a lead; attaching an integrated circuit die to the die attach pad; connecting an internal interconnect to the integrated circuit die and the lead; forming an encapsulation over the integrated circuit die; removing the connector portion to separate the die attach pad and the lead; and forming an isolation cover between the die attach pad and the lead.

Integrated circuit packaging system with tiebar-less design and method of manufacture thereof

An integrated circuit package system includes: fabricating a lead frame including: providing inner leads having an inner lead pitch of progressive length, forming a lead shoulder, on the inner leads, having a shoulder height of a progressive height, and forming outer leads coupled to the lead shoulder and the inner leads; mounting an integrated circuit die on the lead frame; and molding a package body on the lead frame and the integrated circuit die.

Integrated circuit package system with integral inner lead and paddle

A leadframe for a semiconductor package includes signal and ground leads, a ground plane, and a frame paddle. Supports connect the signal and ground leads, ground plane, and frame paddle in at least two different layers. At least one force release and stress relief structure is incorporated into the leadframe to free the ground plane substantially from distortion and warpage resulting from residual mechanical stresses therein.

Integrated circuit leadframe with ground plane

A new design is provided for the design of a leadframe of a semiconductor package. A ground plane is added to the design of the leadframe, the ground frame is located between the leadframe and the die attach paddle over which the semiconductor device is mounted.

Ground plane for exposed package

A new design is provided for the die-paddle that is used as part of a package for packaging semiconductor devices. The new design of the invention creates a space between the ground ring of the die-paddle and the surface over which the ground paddle is mounted. The new design further comprises an S-shaped segment between the ground ring and the center of the die-paddle, the S-shaped segment provides stress relieve between the ground ring and the center of the die-paddle.

Growing community of inventors

Singapore, Singapore

Zheng Zheng