Ricoh Company, Ltd.

Yuuichi Kohno

Masanori Miyata

Tetsuya Okada

Koichi Sogawa

Akinori Suzuki

Tadao Uehara

Kenji Nishihara

Tohru Haruki

Fumihiro Fuchino

Taro Usami

Takuya Takahashi

Shisyo Chin

Hiroaki Teratani

A method of manufacturing a semiconductor device having a first wiring layer, a first interlayer insulating film, a second interlayer insulating film, a third interlayer insulating film, and a second wiring layer, in which the method includes depositing the second wiring layer on the third interlayer insulating film and, where the widths of first wiring layer and the second wiring layer are 10.0 &#x3bc;m or greater, executing one of etching the second wiring layer to set a width of 1.0 &#x3bc;m or greater in a portion where the first wiring layer and the second wiring layer overlap and etching the second wiring layer to seta horizontal distance of 2.0 &#x3bc;m or greater between adjacent portions of the first wiring layer and the second wiring layer.

Method of manufacturing semiconductor device including wiring layout and semiconductor device

A chemical mechanical polishing method including a step of forming a plurality of interlayer insulating films so as to coat a plurality of projecting patterns, at least one of the plurality of projecting patterns being formed on each of a plurality of substrates, whereby the plurality of projection patterns have different area ratios R with respect to the corresponding substrates, and performing a flattening process on the interlayer insulating films before linear approximation; a step of obtaining a linear approximation formula R=aT+b expressing a relationship between the area ratio R and a polishing time T, where R, R, R, . . . , Rx represent the area ratio R of each of the projecting patterns with respect to the corresponding substrates, and T, T, T, . . . , Tx represent the polishing time T required for achieving a target film thickness when performing the flattening process by polishing each of the interlayer insulating films coating the projecting patterns; and a step of calculating, with the use of a formula T=(R&#x2212;b)/a, the polishing time T for the interlayer insulating films coating the projecting patterns having the area ratio R.

Chemical mechanical polishing method and chemical mechanical polishing device

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Sanda, Japan

Yuuichi Kohno