Mentor Graphics Corporation

Other

Siemens Industry Software Gmbh

Mentor Graphics, a Siemens Business

Yuri Granik

Juan Andres Torres Robles

Nicolas Bailey Cobb

Kyohei Sakajiri

Franklin Mark Schellenberg

Konstantinos G Adam

John L Sturtevant

Oberdan Otto

Ir Kusnadi

Dmitry Medvedev

Azat M Latypov

George P Lippincott

James C Word

Uwe Hollerbach

Germain Louis Fenger

Shumay Dou Shang

Joydeep Mitra

Yuansheng Ma

Gurdaman Khaira

Sergey Kobelkov

Yunfei Deng

Thuy Q Do

Lisa Swallow

Yuan He

Krasnova Polina Andreevna

Shumay D Shang

A method and system for calculating probability of success or failure for a lithographic process due to stochastic variations of the lithographic process are disclosed. Lithography is a process that uses light to transfer a geometric pattern from a photomask, based on a layout design, to a resist on a substrate. The lithographic process is subject to random stochastic phenomena, such as photon shot noise and stochastic phenomena in the resist process and resist development, with the resulting stochastic randomness potentially becoming a major challenge. The stochastic phenomena are modeled using a stochastic model, such as a random field model, that models stochastic randomness the exposure and resist process. The stochastic model inputs light exposure and resist parameters and definitions of success of success or failure as to the lithographic process, and outputs a probability distribution function of deprotection concentration indicative of success or failure probability of the lithographic process. In turn, the probability distribution function may be used to modify one or both of the light exposure and resist parameters in order to reduce the effect of stochastic randomness on the lithographic process.

Method and system for calculating probability of success or failure for a lithographic process due to stochastic variations of the lithographic process

A system and method for optimizing an illumination source to print a desired pattern of features dividing a light source into pixels and determining an optimum intensity for each pixel such that when the pixels are simultaneously illuminated, the error in a printed pattern of features is minimized. In one embodiment, pixel solutions are constrained from solutions that are bright, continuous, and smooth. In another embodiment, the light source optimization and resolution enhancement technique(s) are iteratively performed to minimize errors in a printed pattern of features.

Source optimization for image fidelity and throughput

Aspects of the disclosed techniques relate to techniques for resist simulation in lithography. Local minimal light intensity values are determined for a plurality of sample points in boundary regions of an aerial image of a feature to be printed on a resist coating, wherein each of the local minimal light intensity values represents a minimum light intensity value for an area surrounding one of the plurality of sample points. Based on the local minimal light intensity values, horizontal development bias values for the plurality of sample points are then determined. Finally, resist contour data of the feature are determined based at least on the horizontal development bias values.

Horizontal development bias in negative tone development of photoresist

The invention provides for the acceleration of a source mask optimization process. In some implementations, a layout design is analyzed by a pattern matching process, wherein sections of the layout design having similar patterns are identified and consolidated into pattern groups. Subsequently, sections of the layout design corresponding to the pattern groups may be analyzed to determine their compatibility with the optical lithographic process, and the compatibility of these sections may be classified based upon a 'cost function.' With further implementations, the analyzed sections may be classified as printable or difficult to print, depending upon the particular lithographic system. The compatibility of various sections of a layout design may then be utilized to optimize the layout design during a lithographic friendly design process. For example, during the design phase, sections categorized as difficult to print may be flagged for further optimization, processing, or redesign. In further implementations, the difficult-to-print sections may be subjected to a source mask optimization process. Subsequently, the entire layout design may receive a conventional resolution enhancement treatment using the optimized source.

Layout content analysis for source mask optimization acceleration

The disclosed technology is related to adjusting an integrated circuit design while accounting for a local density of the design. In particular exemplary embodiments, a local density value for a layout design that defines a plurality of geometric shapes is derived. Subsequently, one or more of the geometric shapes are adjusted such that the local density value is preserved. With some implementations, the local density value is preserved if the adjusted local density value is within a threshold amount of the derived local density value.

Density-based integrated circuit design adjustment

Aspects of the disclosed technology relate to techniques of generating guiding patterns for via-type feature groups. A guiding pattern is constructed based on seeding positions for a via-type feature group. The initial seeding positions are derived from targeted locations of via-type features in the via-type feature group. A potential energy function is then determined for the guiding pattern. Based on the potential energy function, simulated locations of the via-type features are computed. The seeding positions are compared with the targeted locations and may be adjusted based on differences between the simulated locations and the targeted locations. The above operations may be repeated until one of one or more termination conditions are met.

Generating guiding patterns for directed self-assembly

A system and method for optimizing an illumination source to print a desired pattern of features dividing a light source into pixels and determining an optimum intensity for each pixel such that when the pixels are simultaneously illuminated, the error in a printed pattern of features is minimized. In one embodiment, a method includes selecting a pattern of layout features by determining one or more periodic patterns of features that occurs in the layout database, defining a mathematical relationship between pixel intensities produced by a diffractive optical element and the selected pattern of features, where the mathematical relationship includes a heavier weighting for the periodic patterns of features, and assigning pixel intensities for the diffractive optical element using the mathematical relationship, where the pixel intensities are calculated to print the periodic features with greater image fidelity in proportion to the heavier weighting.

Source optimization by assigning pixel intensities for diffractive optical element using mathematical relationship

Aspects of the invention relate to techniques of generating guiding patterns for via-type feature groups. A guiding pattern may be constructed for a via-type feature group that comprises two or more via-type features in a layout design. A backbone structure may then be determined for the guiding pattern. Based on the backbone structure and a self-assembly model, simulated locations of the two or more via-type features are computed. The simulated locations are compared with targeted locations. If the simulated locations do not match the targeted locations based on a predetermined criterion, the simulated locations adjusted to derive modified locations. Using the modified locations, the above operations may be repeated until the simulated locations match the targeted location based on a predetermined criterion or for a predetermined number of times.

Aspects of the invention relate to techniques of optical simulation for topographically non-uniform substrates. A layout design is simulated to generate an aerial image based on optical models for different types of substrates and for transition regions, along with models for one or more categories of light signals. The one or more categories of light signals comprise trench side-wall reflection signals, trench radiation signals, and trench corner diffraction signals. The one or more categories of light signals may further comprise gate scattering signals and interconnect scattering signals. The models for the one or more categories of light signals may be calibrated with experimental data.

Optical proximity correction for topographically non-uniform substrates

Aspects of the invention relate to techniques for repairing layout design defects after layout data have been processed by resolution enhancement techniques. The repair process first determines a re-correction region that includes three portions: core, transition and visible portions. An inverse lithography process is then performed on the core and transition portions of the re-correction region while taking into account effects from the visible portion to generate a modified re-correction region. The transition portion is processed based on distance from boundary between the transition portion and the core portion such that layout features near the boundary between the transition portion and the core portion are adjusted more than layout features farther away from the boundary.

Layout design defect repair using inverse lithography

Techniques for model calibration and alignment of measurement contours of printed layout features with simulation contours obtained with a model are disclosed. With various implementations of the invention, contour point errors are determined. Based on the contour point errors and a cost function, values of alignment parameters may be determined. The values of alignment parameters may be used to realign the measurement contours for model calibration. The alignment may be conducted concurrently with model calibration.

Contour alignment for model calibration

Methods for approximating simulated contours are provided herein. With some implementations, a function that incorporates a Gaussian proximity kernel to approximate the electron beam exposure effects is used to simulate a printed image. Subsequently, one or more corners of the simulated printed image may be approximated by two or more straight edges. In various implementations, the number of straight edges used to approximate the corner as well as the orientation of the one or more straight edges is determined based upon the characteristics of the corner, such as, the corner having an obtuse angle larger than 135 degrees for example. With various implementations, two straight edges are used to approximate the corner, the orientation of the two straight edges being determined by a first point, a second point, and a shared corner point.

Electron beam simulation corner correction for optical lithography

Various implementations of the invention provide for the generation of 'smooth' mask contours by inverse mask transmission derivation and by subsequently 'smoothing' the derived mask contours by proximity correction.

Inverse mask design and correction for electronic design

A contrast-based resolution enhancing technology (RET) determines a distribution of contrast values for edge fragments in a design layout or portion thereof. Resolution enhancement is applied to the edge fragments in a way that increases the number of edge fragments having a contrast value that exceeds a predetermined threshold.

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Palo Alto, CA, United States of America

Yuri Granik