Ibis Technology Corporation

Axcelis Technologies, Inc.

Seh America, Inc.

Yuri Erokhin

Julian G Blake

Leonard Michael Rubin

Okeg V Konochuk

Shaun Dean Wilson

Kevin J Dempsey

The present invention provides methods for forming SOI wafers having internal gettering layers for sequestering metallic impurities. More particularly, in one embodiment of the invention, a plurality of sites for sequestering metallic impurities are formed in a silicon substrate by implanting a selected dose of oxygen ions therein. In one embodiment, an epitaxial layer of crystalline silicon is formed over the substrate, and a buried continuous oxide layer is generated in the epitaxial layer, for example, by employing a SIMOX process.

Internal gettering in SIMOX SOI silicon substrates

The present invention provides a method for generating silicon-on-insulator (SOI) wafers that exhibit a high electrical resistivity. In one embodiment of a method according to the teachings of the invention, a SIMOX process is sandwiched between two Full Oxygen Precipitation (FOP) cycles that sequester interstitial oxygen present in the substrate in the form of oxide precipitates, thereby enhancing the electrical resistivity of the susbtrate.

Method of producing a high resistivity SIMOX silicon substrate

The present invention provides methods and system for forming a buried oxide layer (BOX) region in a semiconductor substrate, such as, a silicon wafer. In one aspect, in a method of the invention, an initial dose of oxygen ions is implanted in the substrate while maintaining the substrate temperature in a range of about 300&#xb0; C. to 600&#xb0; C. Subsequently, a second dose of oxygen ions is implanted in the substrate while actively cooling the substrate to maintain the substrate temperature in range of about 50&#xb0; C. to 150&#xb0; C. These ion implantation steps are followed by an annealing step in an oxygen containing atmosphere to form a continuous BOX region in the substrate. In one preferred embodiment, the initial ion implantation step is performed in a chamber that includes a device for heating the substrate while the second ion implantation step is performed in a separate chamber that is equipped with a device for actively cooling the substrate. The annealing step can be performed in a third chamber or in either of the first or second chambers.

Active wafer cooling during damage engineering implant to enhance buried oxide formation in SIMOX wafers

A Rutherford backscattering detector for determining the angle of incidence between an ion beam and the crystalline lattice structure of a semiconductor workpiece. A process chamber defines a chamber interior into which one or more workpieces can be inserted for ion treatment, and a rotating workpiece support is disposed within the process chamber for mounting one or more semiconductor workpieces. An energy source sets up an ion plasma from which is created an ion beam which is caused to impact the surface of the semiconductor workpiece. A Rutherford backscattering detector measures the intensity of backscattered particles and the backscattered ion intensity is correlated to an angle of incidence between the ion beam and the crystalline structure of the semiconductor workpiece.

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Newburyport, MA, United States of America

Yuri Erokhin