Lam Research Corporation

Applied Materials, Inc.

Yunsang Kim

Andrew D Bailey, Iii

Keechan Kim

Tong Fang

Gregory Sexton

Neungho Shin

George Stojakovic

Claes H Bjorkman

David Wingto Cheung

Wai-Fan Yau

Gerald Z Yin

Farhad K Moghadam

Andras Kuthi

Judy H Huang

Alan M Schoepp

Jack Chen

Kuowei Liu

Dennis J Yost

Betty Tang

Hongquing Shan

Nasreen Gazala Chapra

Li-Qun Xia

Ellie Y Yieh

Yan Ye

Arthur M Howald

Bryan Y Pu

Hyungsuk Alexander Yoon

William S Kennedy

Hongqing Shan

Xiaoye Zhao

Kenny Linh Doan

Shrikant Lohokare

Min Melissa Yu

Hyuk-Jun Kwon

Joey Chiu

Fang Tian

Andreas Fischer

Gerardo Delgadino

Tzu-Fang Huang

Jingbao Liu

Eller Y Juco

Jason A Ryder

Wen H Zhu

Bodo Kalkofen

Olivier Rigoutat

Dong Woo Paeng

He Zhang

Edmund Burte

Peter K Loewenhardt

Reza Arghavani

Hongching Shan

Roger Alan Lindley

Ruiping Wang

Ivan Berry

Ajey M Joshi

Keith B Wells

Huong Thanh Nguyen

Kaushik Chattopadhyay

Mahmoud Dahimene

Greg Sexton

Lihua Li

Judy Wang

Simon McClatchie

Youn Gi Hong

Henry Fong

Takehiko Komatsu

Heeyeop Chae

Patrick Chung

Lihua Li Huang

Claes H Bj&ouml;rkman

Melody Chang

Takehito Komatsu

Ganapathy Swami

YounGi Hong

Don Curry

Melissa Min Yu

A substrate processing system includes a processing chamber, a substrate support, a laser, and a collimating assembly. The substrate support is disposed in the processing chamber and is configured to support a substrate. The laser is configured to generate a laser beam. The collimating assembly includes lenses or mirrors arranged to direct the laser beam at the substrate to heat an exposed material of the substrate. The lenses or mirrors are configured to direct the laser beam in a direction within a predetermined range of being perpendicular to a surface of the substrate.

Atomic layer etch and deposition processing systems including a lens circuit with a tele-centric lens, an optical beam folding assembly, or a polygon scanner

A lower plasma-exclusion-zone ring for a bevel etcher is provided that is configured to etch a bevel edge of a substrate. The lower plasma-exclusion-zone ring includes a ring-shaped body and a radially-outer stepped surface. The ring-shaped body of the lower plasma-exclusion-zone ring defines an upper surface, a lower surface, a radially inner surface, and a radially outer surface. The radially-outer stepped surface of the lower plasma-exclusion-zone ring extending inwardly into the ring-shaped body between the radially outer surface of the ring-shaped body and the upper surface of the ring-shaped body. The ring-shaped body is made of a material selected from a group consisting of aluminum oxide, aluminum nitride, silicon, silicon carbide, silicon nitride, and yttria.

Lower plasma-exclusion-zone rings for a bevel etcher

An upper plasma-exclusion-zone ring for a bevel etcher is provided that is configured to etch a bevel edge of a substrate. The upper plasma-exclusion-zone ring includes a ring-shaped body and a radially-inner stepped surface. The ring-shaped body of the upper plasma-exclusion-zone ring defines an upper surface, a lower surface, a radially inner surface, and a radially outer surface. The radially-inner stepped surface of the upper plasma-exclusion-zone ring extends inwardly into the ring-shaped body between the radially inner surface of the ring-shaped body and the lower surface of the ring-shaped body. The ring-shaped body is made of a material selected from a group consisting of aluminum oxide, aluminum nitride, silicon, silicon carbide, silicon nitride, and yttria.

Upper plasma-exclusion-zone rings for a bevel etcher

A method for processing a substrate includes providing a substrate with a layer including a material selected from a group consisting of silicon (Si), germanium (Ge) and silicon germanium. The method includes depositing a first layer on the layer of the substrate using atomic layer deposition (ALD). The method includes depositing a second layer on the first layer using ALD. Depositing one of the first layer and the second layer includes depositing phosphorus oxide and depositing the other one of the first layer and the second layer includes depositing antimony oxide. The method includes annealing the substrate to drive antimony and phosphorus from the first layer and the second layer into the layer of the substrate to create a junction.

Method to form ultrashallow junctions using atomic layer deposition and annealing

A system for controlling a size of an edge exclusion region is described. The system includes an upper electrode, an upper plasma exclusion zone (PEZ) ring located beside the upper electrode, an upper electrode extension located beside the upper PEZ ring, and a system controller configured to generate signals regarding a first position and a second position of the upper PEZ ring. The system further includes an actuator and a position controller coupled to the system controller and the actuator. The position controller is configured to receive the signals from the system controller, and to control the actuator based on the signals to achieve the first position and the second position The first and second positions are achieved independent of any movement of the upper electrode.

Edge exclusion control with adjustable plasma exclusion zone ring

A method for forming a junction in a germanium (Ge) layer of a substrate includes arranging the substrate in a processing chamber. The method includes performing a plasma pretreatment on the substrate in the processing chamber for a predetermined pretreatment period using a pretreatment plasma gas mixture including hydrogen gas species. The method includes supplying a doping plasma gas mixture to the processing chamber including a phosphorous (P) gas species and an antimony (Sb) gas species. The method includes striking plasma in the processing chamber for a predetermined doping period. The method includes annealing the substrate during a predetermined annealing period to form the junction in the germanium (Ge) layer.

Plasma assisted doping on germanium

A method of cleaning a bevel edge of a semiconductor substrate is provided. A semiconductor substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. The substrate has a dielectric layer overlying a top surface and a bevel edge of the substrate, the layer extending above and below an apex of the bevel edge. A process gas is introduced into the reaction chamber and energized into a plasma. The bevel edge is cleaned with the plasma so as to remove the layer below the apex without removing all of the layer above the apex.

Control of bevel etch film profile using plasma exclusion zone rings larger than the wafer diameter

Antimony co-doping with phosphorus to form ultrashallow junctions using atomic layer deposition and annealing

A method for isotropically etching film on a substrate with atomic layer control includes a) providing a substrate including a material selected from a group consisting of silicon (Si), germanium (Ge) and silicon germanium (SiGe). The method includes b) depositing a sacrificial layer on the material in a processing chamber by: cooling a lower portion of the substrate; one of creating or supplying an oxidant-containing plasma in the processing chamber; and increasing a surface temperature of the substrate for a predetermined period using rapid thermal heating while creating or supplying the oxidant-containing plasma in the processing chamber. The method includes c) purging the processing chamber. The method includes d) etching the sacrificial layer and the material by supplying an etch gas mixture and striking plasma in the processing chamber.

Isotropic etching of film with atomic layer control

Methods for controlling bevel etch rate of a substrate during plasma processing within a processing chamber includes securing the substrate on a lower electrode within the processing chamber. A power source is provided. A gas mixture is flowed into the processing chamber. A first match arrangement coupled to an upper electrode is adjusted to control current flowing through the upper electrode to change the upper electrode from a grounded state to a floating state. A second match arrangement coupled to a top ring electrode is adjusted to control current flowing through the top ring electrode so as to control plasma formed above a top edge of the substrate. An extension of the upper electrode is lowered during plasma processing so as to minimize a gap between the extension of the upper electrode and the substrate received on the lower electrode, such that the gap is incapable of supporting plasma formed in the processing chamber.

Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof

Methods of doping semiconductor substrates using deposition of a rare earth metal-containing film such as an yttrium-containing film, and annealing techniques are provided herein. Rare earth metal-containing films are deposited using gas, liquid, or solid precursors without a bias and may be deposited conformally. Some embodiments may involve deposition using a plasma. Substrates may be annealed at temperatures less than about 500&#xb0; C.

Rare earth metal surface-activated plasma doping on semiconductor substrates

The embodiments disclosed herein pertain to methods and apparatus for depositing stress compensating layers and sacrificial layers on either the front side or back side of a substrate. In various implementations, back side deposition occurs while the wafer is in a normal front side up orientation. The front/back side deposition may be performed to reduce stress introduced through deposition on the front side of the wafer. The back side deposition may also be performed to minimize back side particle-related problems that occur during post-deposition processing such as photolithography.

Back side deposition apparatus and applications

The embodiments provide apparatus and methods for removal of etch byproducts, dielectric films and metal films near the substrate bevel edge, and chamber interior to avoid the accumulation of polymer byproduct and deposited films and to improve process yield. In an exemplary embodiment, a plasma processing chamber configured to clean a bevel edge of a substrate is provided. The plasma processing chamber includes a substrate support configured to receive the substrate. The plasma processing chamber also includes a bottom edge electrode surrounding the substrate support. The bottom edge electrode and the substrate support are electrically isolated from one another by a bottom dielectric ring. A surface of the bottom edge electrode facing the substrate is covered by a bottom thin dielectric layer. The plasma processing chamber further includes a top edge electrode surrounding a top insulator plate opposing the substrate support. The top edge electrode is electrically grounded. A surface of the top edge electrode facing the substrate is covered by a top thin dielectric layer. The top edge electrode and the bottom edge electrode oppose one another and are configured to generate a cleaning plasma to clean the bevel edge of the substrate.

Methods for processing bevel edge etching

A method for forming a junction on a substrate includes removing a native oxide layer of a bulk material; doping an outer layer of the bulk material with molecular hydrogen to create a hydrogen-doped outer layer; and nano-doping the hydrogen-doped outer layer using one of boron or phosphorous to a target junction depth to create a nano-doped layer.

Systems and methods for forming ultra-shallow junctions

Growing community of inventors

Monte Sereno, CA, United States of America

Yunsang Kim