Taiwan Semiconductor Manufacturing Comp. Ltd.

Chunghwa Picture Tubes, Ltd.

Yung-Cheng Chen

Chin-Hsiang Lin

Chih-Wei Lin

Chi-Hung Liao

Kuei-Shun Chen

Yung-Yao Lee

Shih-Chi Fu

Tzong-Sheng Chang

Fei-Gwo Tsai

Heng-Jen Lee

Jui-Ping Chuang

Meng-Wei Chen

Hsueh-Yi Chung

Wei-Ti Hsu

Yung-Hsiang Chen

Yang-Ann Chu

I-Hsiung Huang

Chue San Yoo

Chang-Jyh Hsieh

Li-Wei Kung

Yeh-Chin Wang

Min-Cheng Wang

Hung-Min Liu

Chi-Ming Yang

Heng-Hsin Liu

Shy-Jay Lin

Chi-Lun Lu

Jui-Chun Peng

Chia-Hung Huang

Yao-Hwan Kao

Tsung-Chih Chien

Yu-Fu Lin

Jui-Chung Peng

Li-Jen Ko

Feng-Ning Lee

Chin-Ming Lin

Tung-Li Wu

Shih-Yu Hsu

Po-Chia Chiu

An extreme ultra violet (EUV) lithography apparatus includes a light source that generates an EUV light beam, a scanner that receives the light from a junction with the light source and directs the light to a reticle stage, and a debris catcher disposed on a EUV beam path between the light source and the scanner. The debris catcher includes a network membrane including a plurality of nano-fibers.

EUV lithography apparatus and operating method for mitigating contamination

Methods for removing haze defects from a photomask or reticle are disclosed. The photomask is placed into a chamber which includes a hydrogen atmosphere. The photomask is then exposed to radiation. The energy from the radiation, together with the hydrogen, causes decomposition of the haze defects. The methods can be practiced on-site and quickly, without the need for wet chemicals or the need to remove the pellicle before cleaning of the photomask. A device for conducting the methods is also disclosed herein.

Methods for cleaning lithography mask

A method includes: providing a workpiece to a semiconductor apparatus, the workpiece including a material layer, wherein the material layer includes a first strip having a first plurality of exposure fields configured to be exposed in a first direction and a second plurality of exposure fields configured to be exposed in a second direction different from the first direction; scanning the first strip along a first scan route in the first direction to generate first topography measurement data; scanning the first strip along a second scan route in the second direction to generate second topography measurement data; and exposing the first plurality of exposure fields according to the first topography measurement data and exposing the second plurality of exposure fields according to the second topography measurement data.

Method and system of surface topography measurement for lithography

A method includes: providing a workpiece to a semiconductor apparatus, the workpiece comprising a material layer, wherein the material layer includes a plurality of areas extending along a first axis; scanning the workpiece in a first direction along the first axis to generate first topography measurement data; scanning the workpiece in a second direction along the first axis to generate second topography measurement data; and performing an exposure operation on the material layer according to the first topography measurement data and the second topography measurement data.

A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.

Method of fabricating reticle

Exposure method of wafer substrate, manufacturing method of semiconductor device, and exposure tool

The present disclosure relates to a method of semiconductor processing. The method includes, receiving a first wafer having a photoresist coating on a face of the first wafer. An exposure unit is used to perform a first number of radiation exposures on the photoresist coating, thereby forming an exposed photoresist coating. The exposed photoresist coating is developed, thereby forming a developed photoresist coating. An OVL measurement zone pattern is selected from a number of different, pre-determined OVL measurement zone patterns based on at least one of: the first number of radiation exposures performed on the first wafer or a previous number of radiation exposures performed on a previously processed wafer, which was processed before the first wafer. A number of OVL measurements are performed on the developed photoresist coating within the selected OVL measurement zone pattern.

Synchronized integrated metrology for overlay-shift reduction

A composite mask suitable for multiple-patterning lithographic processes and a multiple-patterning photolithographic process utilizing the mask are disclosed. An exemplary embodiment includes receiving a mask having a plurality of sub-reticles and a substrate having one or more regions. A first sub-reticle of the plurality of sub-reticles is aligned with a first region of the one or more regions. A movement pattern is designated relative to the substrate. A first photolithographic process is performed including exposing the substrate using the mask to form a first exposed area on the substrate. An alignment of the mask relative to the substrate is shifted according to a first direction determined by the movement pattern. A second photolithographic process is performed including exposing the substrate using the mask to form a second exposed area on the substrate such that the second exposed area overlaps the first.

Multiple-patterning photolithographic mask and method

A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.

Frame cell for shot layout flexibility

A method of measuring a surface structure of a display device is provided. The display device includes first and second substrates, first and second patterned light-shielding layers, and first and second pixel units. The first patterned light-shielding layer disposed on a surface of the first substrate includes first openings. The second patterned light-shielding layer disposed on the surface of the first substrate includes second openings. The first pixel unit includes first and second protrusions. The first protrusion correspondingly covers the first openings and a portion of the first patterned light-shielding layer. The second protrusion is disposed on and directly contacted with the first and second patterned light-shielding layers. The second pixel unit includes a third protrusion correspondingly covering the second openings and a portion of the second patterned light-shielding layer, wherein sizes of the second openings are smaller than sizes of the first openings.

Method of measuring surface structure of display device

A wafer edge exposure module connected to a semiconductor wafer track system. The wafer edge exposure module includes a wafer spin device, an optical system, a scanner interface module, and a controller. The wafer spin device supports a wafer for processing. The optical system directs exposure light on a respective edge portion of the wafer simultaneously to create a dummy track on the edge of the wafer. The scanner interface module sends and/or receives dummy edge exposure information from a scanner via a computer network. The controller receives the dummy edge exposure information from the scanner interface module and uses the exposure information to control the optical system.

Wafer edge exposure module

A display device and a method of measuring a surface structure of the same are provided. The display device includes first and second substrates, first and second patterned light-shielding layers, and first and second pixel units. The first patterned light-shielding layer disposed on a surface of the first substrate includes first openings. The second patterned light-shielding layer disposed on the surface of the first substrate in the first patterned light-shielding layer includes second openings. The first pixel unit includes first and second protrusions. The first protrusion correspondingly covers the first openings and a portion of the first patterned light-shielding layer. The second protrusion is disposed in the first and second patterned light-shielding layers. The second pixel unit includes a third protrusion correspondingly covering the second openings and a portion of the second patterned light-shielding layer, wherein sizes of the second openings are smaller than sizes of the first openings.

Display device and method of measuring surface structure thereof

A method and apparatus provide for simultaneously moving multiple semiconductor wafers in opposite directions while simultaneously performing processing operations on each of the wafers. The semiconductor wafers are orientated in coplanar fashion and are disposed on stages that simultaneously translate in opposite directions to produce a net system momentum of zero. The die of the respective semiconductor wafers are processed in the same spatial sequence with respect to a global alignment feature of the semiconductor wafer. A balance mass is not needed to counteract the motion of a stage because the opposite motions of the respective stages cancel each other.

Semiconductor processing apparatus with simultaneously movable stages

Growing community of inventors

Jhubei, Taiwan

Yung-Cheng Chen