Other

Nxp B.v.

Yuji Yamaguchi

Pierre Leroux

There is a structure and method for measuring the lengths of lines and spaces in semiconductor process. In an example embodiment, a lithographic structure () comprises, a frame (). The frame includes a top inside edge, a top outside edge, a bottom inside edge, a bottom outside edge, a left inside edge, a left outside edge, a right inside edge, and a right outside edge. There is a first array of lines () and spaces, the first array having end of lines () and end of spaces (). The lines have a first line width and the spaces have a first space width; the end of spaces are at a first distance () from the top outside edge of the frame (), the end of lines are at a second distance () from the top outside edge of the frame (). A first opening () is a third distance () from the bottom outside edge of the frame and a second opening () is a fourth distance () from the bottom outside edge of the frame.

Method and lithographic structure for measuring lengths of lines and spaces

The present invention enables the user to measure process line shortening (PLS) on an overlay tool. In an example embodiment (), to obtain the PLS, the user applies a method to determine the misalignment (MA) of a composite image on a substrate (), from the composite image the user may determine the total line () shortening (TLS) and the equipment line () shortening (ELS). The process line shortening (PLS) is determined () as a function of TLS and ELS.

Growing community of inventors

San Antonio, TX, United States of America

Yuji Yamaguchi