Taiwan Semiconductor Manufacturing Comp. Ltd.

Yuh-Ta Fan

Ding-I Liu

Chui-Ya Peng

Yen Chuang

Chih-Fen Chen

Pin-Hen Lin

Ching Yu

Jyh-Nan Lin

Chia-Ming Tsai

Chandrashekhar Prakash Savant

Tien-Wei Yu

Kai-Shiung Hsu

Hui-An Han

Chun Hsiung Tsai

Kuo-Feng Yu

Chee-Wee Liu

Chin-Kun Wang

Wei-Fan Lee

Chih-Hsiung Huang

Tzu-Yao Lin

The present disclosure describes a semiconductor device having metal boundary trench isolation with electrically conductive intermediate structures acting as a metal diffusion barrier. The semiconductor structure includes a first fin structure and a second fin structure on a substrate, an insulating layer between the first and second fin structures, a gate dielectric layer on the insulating layer and the first and second fin structures, and a first work function stack and a second work function stack on the gate dielectric layer. The first work function stack is over the first fin structure and a first portion of the insulating layer, and the second work function stack is over the second fin structure and a second portion of the insulating layer adjacent to the first portion. The semiconductor structure further includes a conductive intermediate structure on the gate dielectric layer and between the first and second work function stacks.

Trench isolation with conductive structures

In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a protective layer is formed at a surface region of the first conductive layer, a metallic layer is formed by applying a metal containing gas on the protective layer, and the metallic layer is removed by a wet etching operation using a solution. The protective layer is resistant to the solution of the wet etching operation.

Method of manufacturing semiconductor devices and semiconductor devices

A semiconductor device includes a metal layer, an insulating layer disposed above the metal layer, and a multi-layer diffusion barrier disposed on the metal layer between the metal layer and the insulating layer. The multi-layer diffusion barrier includes a first material layer including a metallic nitride and a second material layer including a metallic oxide.

Semiconductor device having a multi-layer diffusion barrier and method of making the same

A semiconductor device includes a gate stack over a semiconductor substrate. A spacer extends along a first sidewall of the gate stack. An epitaxy structure is in the semiconductor substrate. A liner wraps around the epitaxy structure and has an outer surface in contact with the semiconductor substrate and an inner surface facing the epitaxy structure. The outer surface of the liner has a first facet extending upwards and towards the gate stack from a bottom of the first liner and a second facet extending upwards and towards an outer sidewall of the spacer from a top of the first facet to a top of the liner, such that a corner is formed between the first facet and the second facet, and the inner surface of the first liner defines a first curved corner pointing towards the corner formed between the first facet and the second facet.

Semiconductor device and manufacturing method thereof

Semiconductor device having multi-layer diffusion barrier and method of making the same

A semiconductor device includes a gate stack over a semiconductor substrate. A spacer extends substantially along a first sidewall of the gate stack. An epitaxy structure is in the semiconductor substrate. A liner wraps around the epitaxy structure and has an outer surface in contact with the semiconductor substrate and an inner surface facing the epitaxy structure. The outer surface of the liner has a first facet extending upwards and towards the gate stack from a bottom of the first liner and a second facet extending upwards and towards an outer sidewall of the spacer from a top of the first facet to a top of the liner, such that a corner is formed between the first facet and the second facet, and the inner surface of the first liner defines a first curved corner pointing towards the corner formed between the first facet and the second facet.

Semiconductor device

Semiconductor device having a multi-layer diffusion barrier

A semiconductor device includes a substrate, a liner, and an epitaxy structure. The substrate has a recess. The liner is disposed in the recess. The liner is denser than the substrate. The epitaxy structure is disposed in the recess. The liner is disposed between the epitaxy structure and the substrate.

According to one example, a process includes performing a first plurality of layer deposition cycles of a deposition process on a substrate, and after performing the first plurality of layer deposition cycles, performing a plasma enhanced layer deposition cycle comprising a plasma treatment process. The first plurality of layer deposition cycles are performed without a plasma treatment process.

Plasma enhanced atomic layer deposition

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and an interfacial layer formed over the substrate. The semiconductor structure further includes a gate structure formed over the interfacial layer. In addition, the interfacial layer is made of metal germanium oxide, metal silicon oxide, or metal germanium silicon oxide and is in direct contact with a top surface of the substrate.

Growing community of inventors

Shinchu, Taiwan

Yuh-Ta Fan