Samsung Electro-mechanics Co., Ltd.

Yuan Jing Li

Seung Wook Park

Young Do Kweon

Jin Gu Kim

Hyung Jin Jeon

Jong Yun Lee

Ju Pyo Hong

Hee Kon Lee

A method of manufacturing a stacked wafer level package includes: preparing a substrate; forming a conductive layer on the substrate; forming chip connection pads and internal connection pads on the conductive layer; forming solder balls connected to the internal connection pads; mounting a semiconductor chip on the conductive layer to be connected to the chip connection pads; forming a sealing member to seal the solder balls and the semiconductor chip; separating the substrate from the conductive layer; forming a rearrangement wiring layer by etching the conductive layer; forming an external connection on the rearrangement wiring layer; forming contact holes in the sealing member to expose the solder balls; and stacking an electronic component to be electrically connected to the solder balls exposed through the contact holes.

Method of manufacturing stacked wafer level package

Growing community of inventors

Suwon-si, South Korea

Yuan Jing Li