Industrial Technology Research Institute

Au Optronics Corporation

National Taiwan University

Sensortek Technology Corp.

Unique Materials Co., Ltd.

Other

Mediatek Corporation

Unimicron Technology Corporation

Gemtek Technology Co., Ltd.

Yu-Min Lin

Tao-Chih Chang

Sheng-Tsai Wu

Ang-Ying Lin

Shin-Yi Huang

Chao-Jung Chen

Feng-Yuan Gan

Yuan-Yin Lo

Tzu-Hsuan Ni

Maria C Yuang

Wei-Chung Lo

Jing-Yao Chang

Yu-Wei Huang

Hsin-Li Chen

Chau-Jie Zhan

Kuo-Lung Fang

Ming-Daw Chen

Su-Tsai Lu

Chang-Ho Liou

Pi-Tai Chou

An-Yeu Wu

Rong-Shen Lee

Shi-Wei Lee

Chia-Chun Hsieh

Shang-Wei Chou

Chin-Cheng Chiang

Chih-Kung Lee

Yu-Hua Chen

Chang-Sheng Chen

Jung-Mao Lin

Yi Chun Chen

Chih-Yuan Lin

Winston I Way

Yu-Lin Chao

Chun-Nan Lin

San-Liang Lee

Wen-Jong Wu

Po-Lin Chen

Shu-Jung Yang

Po-Lung Tien

Heng-Chieh Chien

Kuo-Shu Kao

Dar-Zu Hsu

Chien Sheng Chen

Feng-Jung Hsu

Yu-Hsiang Hsu

Po-Kai Chiu

Chih-Yao Wang

Jing-Ye Juang

Hsin-Han Lin

Wei-Chen Chen

Ren-Shin Cheng

Po-Chen Lin

Ju-Lin Shih

Chih Hung Hsu

Wen-Hung Liu

Ching-Kuan Lee

Po-Chih Chang

Ching Yuan Yang

I-Fen Chao

Bird C Lo

Hung-Lin Chen

Shih-Hsuan Lin

Tien-Chi Wang

Win-Chin Chiang

Ting Lian Chang

Chun-Hung Kuo

Jing Geng

Tsung-Yu Chu

Jie-Fang Zhang

Hung-Chi Kuo

The present invention provides an ambient light sensing method and an ambient light sensor. The ambient light sensing method comprises a light sensing device sensing the light passing through an optical filter and giving an optical signal value, and an operational unit receiving the optical signal value and calculating an ambient light illuminance value according to the optical signal value. Accordingly, the ambient light sensing method and the ambient light sensor according to the present invention can give the ambient light illuminance value with more accuracy and ensure low influence of opaque ink on ambient light sensing.

Ambient light sensing method and ambient light sensor

A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes a redistribution circuit structure; a first semiconductor chip disposed on the redistribution structure and having a first active surface on which a first conductive post is disposed; a second semiconductor chip disposed above the first semiconductor chip and having a second active surface on which a first conductor is disposed; and a first encapsulant disposed on the redistribution circuit structure and encapsulating at least the first semiconductor chip, wherein the first conductive post and the first conductor are aligned and bonded to each other to electrically connect the first semiconductor chip and the second semiconductor chip.

Multi-chip package and manufacturing method thereof

A package carrier, including a first redistribution structure layer, multiple conductive connecting members, a connection structure layer, at least one stiffener, and a molding compound, is provided. The conductive connecting members are disposed on a first surface of the first redistribution structure layer and are electrically connected to the first redistribution structure layer. The connection structure layer is disposed on a second surface of the first redistribution structure layer and includes a substrate and multiple pads. A top surface and a bottom surface of each pad are respectively exposed to an upper surface and a lower surface of the substrate. The pads are electrically connected to the first redistribution structure layer. The stiffener is disposed on the first surface and is located at least between the conductive connecting members. The molding compound is disposed on the first surface and covers the conductive connecting members and the stiffener.

Package carrier having a stiffener between solder bumps

An optical sensor module and a packaging method thereof are disclosed, wherein the optical sensor module comprises a substrate having a light sensing element; and a housing made of a transparent material. The housing is connected to the substrate and covers the light sensing element. The housing has a light-receiving area facing the light sensing element, and the inner surface of the housing toward the substrate is provided with a light-shielding coating in a portion outside of the light-receiving area. In this way, optical components such as the light sensor can be effectively protected, and still retain the effect of avoiding noise light interference with the light sensor module.

Optical sensor module and packaging method thereof

An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure.

Integrated antenna package structure

A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer. The circuit substrate is electrically connected to the second redistribution structure layer of the package assembly through the connectors.

Heterogeneous integration semiconductor package structure

A package substrate includes a substrate, an insulating protective layer and an interposer. The substrate has a first surface and a second surface opposing to the first surface. The substrate includes a plurality of first conductive pads embedded in the first surface. The insulating protective layer is disposed on the first surface of the substrate. The insulating protective layer has an opening for exposing the first conductive pads embedded in the first surface of the substrate. The interposer has a top surface and a bottom surface opposing to the top surface. The interposer includes a plurality of conductive vias and a plurality of second conductive pads located on the bottom surface. The interposer is located in a recess defined by the opening of the insulating protective layer and the first surface of the substrate. Each of the second conductive pads is electrically connected to corresponding first conductive pad.

Package substrate and method of fabricating the same and chip package structure

A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes: an interposer including a wiring structure and an interposer via electrically connected to the wiring structure; a plurality of semiconductor chips located on a first surface of the interposer and electrically connected to each other through the interposer; an encapsulant located on the first surface of the interposer and encapsulating at least a portion of the plurality of semiconductor chips; and a redistribution circuit structure located on a second surface of the interposer opposite to the first surface, wherein the plurality of semiconductor chips are electrically connected to the redistribution circuit structure through at least the interposer.

An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.

Image sensor package and manufacturing method thereof

A chip scale package structure is provided. The chip scale package structure includes an image sensor chip and a chip. The image sensor chip includes a first redistribution layer including a conductive wire and a conductive pad formed on the conductive wire, wherein the conductive pad is exposed from the surface of the first redistribution layer. The chip includes a plurality of through silicon via (TSV) and a second redistribution layer including a conductive wire and a conductive pad formed on the conductive wire, wherein the conductive pad is exposed from the surface of the second redistribution layer. The area of the chip is smaller than that of the image sensor chip. The second redistribution layer of the chip bonds to the first redistribution layer of the image sensor chip.

Chip scale package structures

A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes: an interposer including a dielectric body, a plurality of semiconductor bodies separated by the dielectric body, a through via penetrating through the dielectric body, and a wiring structure located in each of the plurality of semiconductor bodies; a plurality of semiconductor chips located side by side on a first surface of the interposer and electrically connected to the wiring structure; an encapsulant located on the first surface of the interposer and encapsulating at least a portion of the plurality of semiconductor chips; and a redistribution circuit structure located on a second surface of the interposer opposite to the first surface of the interposer and electrically connected to the plurality of semiconductor chips through the through via.

Multi-chip package and manufacture method thereof

A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.

Package structure and method for connecting components

A piezoelectric motorization system has a mechanically flexible body that has one or more surfaces for placing piezoelectric actuators. The system has groups of piezoelectric actuators each positioned on one of the surfaces of the mechanically flexible body that is connected to the electronic circuitry. The electronic circuitry controls the driving of the mechanical loads by the mechanically flexible body by injecting sets of control signals into different groups of actuators positioned on the mechanically flexible body. Each control signal operates groups of driving frequencies with an adjustable amplitude ratio and an adjustable phase difference among driving frequencies. And, under a set of boundary conditions exhibited by a set of structural dimensions of the mechanically flexible body, each control signal induces multi-mode resonance of the mechanically flexible body for driving the mechanical loads multi-dimensionally.

Piezoelectric apparatus for motorization

Growing community of inventors

Hsinchu County, Taiwan

Yu-Min Lin