United Microelectronics Corp.

United Microelectronics Corps.

Yu-Ju Yang

Kuo-Yuh Yang

Yu-Hong Huang

Ching-Ming Lee

Yi-Min Jen

A method for increasing tolerance of contact extension alignment in a capacitor over a bit line of a dynamic random access memory is disclosed. Firstly, a substrate having a gate, a bit line and a source/drain region is provided and a insulating layer is formed on the substrate. Then, a dielectric layer is deposited on the insulating layer. Moreover, a contact hole is formed by defining and etching the dielectric layer and the insulating layer to expose a portion of the source/drain region. Furthermore, a conductive layer is deposited on the dielectric layer and the contact hole, wherein the etching selectivity ratio of the conductive layer is near the etching selectivity ratio of the dielectric layer. Finally, an electrode of the capacitor is formed by defining and etching the conductive layer, whereby the dielectric layer protects the portion of the electrode that is beneath the dielectric layer from being etched when misalignment occurs.

Method for increasing tolerance of contact extension alignment in COB DRAM

The present invention provides a method for forming capacitor of a dynamic random access memory cell. The method comprises providing a substrate and the word line structures formed thereon. A first dielectric layer is deposited on the substrate and the word line structures. A first polysilicon layer is deposited to form bit line contacts and bit lines. A second dielectric layer is formed on the first dielectric layer and the bit lines. The partial second dielectric layer is removed to form at least a wall structure in the second dielectric layer. The partial second dielectric layer and partial first dielectric layer are removed to form a capacitor contact opening. A second polysilicon is deposited into the capacitor contact opening and on the wall structure and the second dielectric layer. The partial second polysilicon is removed to form a capacitor node whereby a side-wall of the capacitor node is adjacent to the wall structure.

Growing community of inventors

Hsin-Chu, Taiwan

Yu-Ju Yang