Taiwan Semiconductor Manufacturing Comp. Ltd.

Yu-Fei Huang

Dun-Nian Yaung

Cheng-Eng D Chen

Ming Xiang Li

Jacob Chen

Edward Wan

An interconnect structure and a method of forming the interconnect structure are provided. Two wafers (and/or dies) are bonded together. A multi-via interconnect structure is formed extending from a backside of a first substrate to interconnect structures in the metallization layers on the first integrated circuit and the second integrated circuit. The multi-via interconnect structure may be formed by thinning a first substrate of a first wafer and forming a first opening through the first substrate. A second opening extends from the first opening to a first interconnect structure on the first wafer, and a third opening extends from the first interconnect structure on the first wafer to a second interconnect structure on the second wafer. The first, second, and third openings are filled with a conductive material, thereby forming a multi-via interconnect structure.

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Pleasanton, CA, United States of America

Yu-Fei Huang