Taiwan Semiconductor Manufacturing Comp. Ltd.

Coretronic Corporation

Yu-Ching Lee

Yu-Piao Fang

Sheng-Chi Chin

Te-Chih Huang

Kuan-Wen Lin

Jun-Hao Deng

Chun-Hung Lin

Jian-Hong Lin

Ting-Hao Hsu

Ching-Fang Yu

Tzu-Li Lee

Hsin-Chun Chang

Kuo-Yen Liu

Yih-Ching Wang

Ching-Hsiang Chang

Chih-Kuang Yang

Ping-Yeng Chen

Han-Yuan Liu

Yi-Hsun Lee

Yu-Wei Liao

Mark Chang

Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.

Acoustic measurement of fabrication equipment clearance

A method includes forming a first material layer on a semiconductor wafer, the first material layer comprising a first periodic structure within an overlay mark region of the semiconductor wafer and forming a second material layer on the semiconductor wafer, the second material layer comprising a second periodic structure in the overlay mark region. The method further includes with an acoustic transmitter device disposed within the overlay mark region, transmitting an acoustic wave across both the first periodic structure and the second periodic structure. The method further includes, with an acoustic wave receiver device, detecting the acoustic wave and determining an overlay error between the first material layer and the second material layer based on the acoustic wave as detected by the acoustic wave receiver device.

Method and structures for acoustic wave overlay error determination

An overlay mark includes a first, a second, a third, and a fourth component. The first component is located in a first region of the first overlay mark and includes a plurality of gratings that extend in a first direction. The second component is located in a second region of the first overlay mark and includes a plurality of gratings that extend in the first direction. The third component is located in a third region of the first overlay mark and includes a plurality of gratings that extend in a second direction different from the first direction. The fourth component is located in a fourth region of the first overlay mark and includes a plurality of gratings that extend in the second direction. The first region is aligned with the second region. The third region is aligned with the fourth region.

Multi-function overlay marks for reducing noise and extracting focus and critical dimension information

An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.

Interconnect structure and forming method thereof

A transportation container is provided with a container body constructed of a top wall, a bottom wall, a rear wall, and two sidewalls forming a front opening for loading or unloading a reticle pod into or out of the container body; a lid for opening and closing the front opening; and a lift plate above the container body configured to connect to a carrier of an overhead hoist transfer (OHT) system.

Reticle transportation container

Methods for manufacturing a semiconductor structure are provided. A substrate is provided. A metrology target is formed in a layer over the substrate according to a first layer mask and a second layer mask. The metrology target includes a first pattern formed by a plurality of first photonic crystals corresponding to the first layer mask and a second pattern formed by a plurality of second photonic crystals corresponding to the second layer mask. First light is provided to illuminate the metrology target. Second light is received from the metrology target in response to the first light. The second light is analyzed to detect overlay-shift between the first pattern and the second pattern. The first pattern and the second pattern are arranged to cross in one direction in the metrology target.

Method for manufacturing semiconductor structure

Overlay-shift measurement systems are provided. An overlay-shift measurement system includes an optical device, a first light detection device and a processor. The optical device is configured to provide an input light to a metrology target of a semiconductor structure. The first light detection device is configured to receive a transmitted light from the metrology target when the input light penetrates the metrology target. The processor is configured to determine whether overlay-shift between a plurality of first photonic crystals and a plurality of second photonic crystals in the metrology target is present according to characteristics of the transmitted light.

Overlay-shift measurement system

A method includes depositing a first dielectric layer over a substrate; forming a first dummy metal layer over the first dielectric layer, wherein the first dummy metal layer has first and second portions laterally separated from each other; depositing a second dielectric layer over the first dummy metal layer; etching an opening having an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first dummy metal layer, and a lower portion in the first dielectric layer, wherein a width of the lower portion of the opening is greater than a width of the middle portion of the opening, and a bottom of the opening is higher than a bottom of the first dielectric layer; and forming a dummy via in the opening and a second dummy metal layer over the dummy via and the second dielectric layer.

Method of fabricating semiconductor device including dummy via anchored to dummy metal layer

Methods for manufacturing a semiconductor structure are provided. A substrate is provided. A first lithography is performed according to a first layer mask, to form a plurality of first photonic crystals with a first pitch on a first area of a layer above the substrate. A second lithography is performed according to a second layer mask, to form a plurality of second photonic crystals with a second pitch on a second area of the layer. A light is provided to illuminate the first and second photonic crystals. Light reflected by the first and second photonic crystals or transmitted through the first and second photonic crystals is received. The received light is analyzed to detect overlay-shift between the first photonic crystals corresponding to the first layer mask and the second photonic crystals corresponding to the second layer mask.

Overlay-shift measurement system and method for manufacturing semiconductor structure and measuring alignment mark of semiconductor structure

An apparatus configured to load or unload a mask pod includes a first load port supporter and a second load port supporter spaced apart from the first load port supporter. Each of the first load port supporter and the second load port supporter includes at least portions of an L-shaped rectangular prism. The first load port supporter and the second load port supporter are disposed diagonally around a rectangular area, where first inner sidewalls of the first load port supporter and second inner sidewalls of the second load port supporter delimit boundaries of the rectangular area, and where a first width of the rectangular area is equal to a second width of the mask pod, and a first length of the rectangular area is equal to a second length of the mask pod.

Optical reticle load port

A structure includes a first periodic structure positioned on a chip, the first periodic structure comprising a material of a first layer disposed on the chip. The structure further includes a second periodic structure positioned within the region of the chip adjacent the first periodic structure, the second periodic structure comprising a second material of a second layer disposed on the chip. The structure further includes an acoustic wave transmitter device disposed on the chip and an acoustic wave receiver device disposed on the chip.

Growing community of inventors

Kaohsiung, Taiwan

Yu-Ching Lee