Samsung Electronics Co., Ltd.

Other

Young Hee Song

Cheol Jun Yoo

Seong Deok Hwang

Sang Hyun Lee

Young Do Kweon

Min Young Son

Sa Yoon Kang

Sung Sik Yun

Ki Hong Song

Ill Heung Choi

Hai Jeong Sohn

Hyouk Lee

Jun Hee Jeong

Young Jae Song

Jae Sung You

Jung Jin Kim

Sung Min Sim

Jun Young Jeon

Woong Ky Ha

Ming Young Son

Joung Rhang Lee

The semiconductor package according to the present invention comprises: an integrated substrate; a bottom chip stack, which is mounted on the integrated substrate, has multiple memory semiconductor dies stacked chip-on-chip, and takes charge of a part of the whole memory capacity; at least one top chip stack, which is mounted on the bottom package, has multiple memory semiconductor dies mounted therein, and takes charge of the rest of the whole memory capacity; an integration wire for electrically connecting the bottom chip stack and the top chip stack(s); and an integration protection member for sealing the integration wire.

Package substrate comprising side pads on edge, chip stack, semiconductor package, and memory module comprising same

A wearable smart device of the present invention comprises: a main body on which a basic module is mounted; a band on which at least one auxiliary module is mounted, which is selectively attached and detached to the main body made of a polymer material or a rubber material to be bent; a connector electrically connecting the main body and the band; and a coupler physically connecting the main body and the band. According to a configuration of the present invention, the present invention is possible in realizing a high-capacity and high-performance smart device.

Wearable smart device having flexible semiconductor package mounted on a band

A light source module including: a cover unit having a pipe structure with one open end or two open ends; a cap unit coupled to the one open end or two open ends of the cover unit; a light source unit including a light emitting device, the light source unit mounted on the cap unit and covered by the cover unit; and a wavelength conversion unit disposed in an internal space of the cover unit and coupled to the light source unit while covering the light emitting device, the wavelength conversion unit converting a wavelength of light emitted from the light emitting device to allow the wavelength-converted light to be emitted through the cover unit.

Light source module and illumination apparatus having the same

A light emitting diode (LED) package and a manufacturing method thereof are provided. The LED package includes a substrate including a circuit layer, an LED mounted on the substrate, and a plurality of protruded reflection units disposed in a region excluding an LED mounting region on the substrate and configured to reflect light generated from the LED.

Light emitting diode package and manufacturing method thereof

An illumination device includes a main body unit, a light source module and a cover unit. The light source module is disposed in an upper space of the main body unit to be separated therefrom and includes a substrate and at least one light emitting device respectively disposed on both surfaces of the substrate. The cover unit is disposed on the main body unit to cover the light source module and allowing light emitted from the light source module to be emitted from a surface of the cover unit in a radial manner.

Illumination device

There is provided a light emitting device package including: a substrate having a cavity formed therein; a heat sink provided on a bottom surface of the cavity to be adjacent to an inner wall of the cavity; a light emitting device mounted on the heat sink; and a phosphor layer provided within the cavity and covering the heat sink and the light emitting device.

Light emitting device package and manufacturing method thereof

Provided is a light emitting device package including: a plurality of lead frames disposed to be separated from one another; at least one light emitting device mounted on the lead frames and electrically connected to the lead frames through a bonding wire provided on a wire bonding pad, the wire bonding pad being disposed on the same surface as a light emission surface provided as an upper surface of the light emitting device; a body part formed to encapsulate and support the wire bonding pad, the bonding wire, the light emitting device and the lead frames, and having a reflective groove formed in an upper surface thereof to expose the light emission surface to the outside therethrough; and a lens part disposed on the body part, to cover the light emitting device.

Light emitting device package and method of manufacturing the same

There is provided a light emitting device package including: a substrate having a circuit pattern formed on at least one surface thereof and including an opening; a wavelength conversion layer formed by filling at least a portion of the opening with a wavelength conversion material; and at least one light emitting device disposed on a surface of the wavelength conversion layer and electrically connected to the circuit pattern.

A semiconductor chip with conductive wiring that is routed to the edge of the substrate from the chip's backside. A plurality of such semiconductor chips are stacked and electrically connected using a wiring element that is a circuit board or conductive adhesive strips. The wiring element connects the conductive wiring of each semiconductor chip along the sides of the chips to the package substrate. A method of manufacturing the semiconductor chip includes batch manufacturing a plurality of die on a wafer with an active surface on which a plurality bonding pads are formed, and a backside which is the rear side of the active surface; forming a circuit groove on the backside; applying conductive wiring on the circuit groove using a conductive material; and separating the wafer into a plurality of semiconductor chips. A method of manufacturing the chip stack package with a plurality of such semiconductor chips having bump pads and connection pads routed to the side surface of the semiconductor chip includes stacking and bonding the bonding pad of the upper semiconductor chip on the bump pad of a lower semiconductor chip; electrically connecting the bonding pad of the lowest semiconductor chip to the substrate by bump bonding electrically connecting the wiring element to the connection pad of the semiconductor chip and the substrate; and connecting an external connection to the substrate.

Semiconductor chip, chip stack package and manufacturing method

A method for manufacturing a semiconductor chip package includes: preparing a semiconductor chip having center and edge bonding pads and a substrate, which includes a first window, a second window, connection pads, external terminal pads, and a wiring pattern; attaching the semiconductor chip on the substrate such that the first window exposes the center bonding pads and the second window exposes the edge bonding pads; connecting the first and second bonding pads to corresponding connection pads; encapsulating side surfaces of the semiconductor chip, a portion of the bottom surface of the substrate, the bonding wires, and the connection pads; and forming external terminals on the external terminal pads of the substrate. The encapsulating includes a first encapsulation of the side surfaces of the semiconductor chip and a portion of the bottom surface of the substrate and a second encapsulation of the bonding wires and the connection pads.

Semiconductor chip package having a semiconductor chip with center and edge bonding pads and manufacturing method thereof

A method of manufacturing a wafer level package includes forming a semiconductor wafer including semiconductor chips, and forming a package body on the sides of each semiconductor chip. The package body is formed by forming a space between each semiconductor chip and potting a package material in the space, which can be a mold resin. The wafer is then separated into separate semiconductor chips by cutting through the package body.

Wafer level package having a side package

A semiconductor chip has connection lines that are routed to the side surface from bump pads on the back surface of the chip. Such semiconductor chips are stacked on a circuit board to form a chip stack package while bumps are interposed between the bump pads of the lower chip and bonding pads of the upper chip. Further, an interconnecting member such as a conductive adhesive or a wiring board is applied to the side surfaces of the stacked chips such that the connection lines are connected to the interconnecting member. Therefore, the centrally disposed bonding pads of the chips are electrically connected to the circuit board through the bumps, the bump pad, the connection lines and the interconnecting member. The semiconductor chip may have heat dissipation part formed on the back surface. Methods of manufacturing the semiconductor chip and the chip stack package are also provided.

Dual-lead type substantially square semiconductor packages and dual in-line memory modules using them are disclosed. The conventional memory module is internationally standardized, so it is hard to increase memory density by adding current packages to the module. The substantially square semiconductor packages provide improved and smaller packages in which a package length and a pin pitch are reduced, so that the memory density is increased without modifying a module size. The length of the leads are preferably substantially equal.

Dual-lead type square semiconductor package and dual in-line memory module using the same

A semiconductor chip package includes a semiconductor chip and a substrate on which the semiconductor chip attaches. The semiconductor chip includes center and edge bonding pads. The substrate includes a first window that exposes the center bonding pads, a second window that exposes the edge bonding pads, connection pads around the first and second windows, external terminal pads, and a wiring pattern. The semiconductor chip package further includes bonding wires, an encapsulation body, and external terminals. The bonding wires connect the center and edge bonding pads of the semiconductor chip to the connection pads of the substrate. A method for manufacturing a semiconductor chip package includes: preparing a semiconductor chip having center and edge bonding pads and a substrate, which includes a first window, a second window, connection pads, external terminal pads, and a wiring pattern; attaching the semiconductor chip on the substrate such that the first window exposes the center bonding pads and the second window exposes the edge bonding pads; connecting the first and second bonding pads to corresponding connection pads; encapsulating side surfaces of the semiconductor chip, a portion of the bottom surface of the substrate, the bonding wires, and the connection pads; and forming external terminals on the external terminal pads of the substrate. The encapsulating includes a first encapsulation of the side surfaces of the semiconductor chip and a portion of the bottom surface of the substrate and a second encapsulation of the bonding wires and the connection pads.

Growing community of inventors

Gyeonggi-do, South Korea

Young Hee Song