Tokyo University of Agriculture and Technology

National Institute of Information and Communications Technology, Incorporated

National Institute for Research in Inorganic Materials

Yoshiyuki Suda

Toshiaki Matsui

Koh Era

Osamu Mishima

Nobumitsu Hirose

Kyohei Degura

Akifumi Kasamatsu

Akira Motohashi

Satoshi Agawa

Katsumi Okubo

Takahiro Tsukamoto

Takuma Yagi

Yutaka Ota

A semiconductor laminate film includes a silicon substrate and a semiconductor layer formed on the silicon substrate and containing silicon and germanium. The semiconductor layer having a surface roughness Rms of 1 nm or less. Further, the semiconductor layer satisfies the following relationship t≤0.881×xwhere t represents a thickness (nm) of the semiconductor layer, and x represents a ratio of the number of germanium atoms to a sum of the number of silicon atoms and the number of germanium atoms in the semiconductor layer. Also, the semiconductor layer being a mixed crystal semiconductor layer containing silicon and germanium.

Manufacturing method for semiconductor laminated film, and semiconductor laminated film

A method of producing a semiconductor laminate film includes forming a semiconductor layer containing silicon and germanium on a silicon substrate by a sputtering method. In the sputtering method, a film formation temperature of the semiconductor layer is less than 500&#xb0; C., and a film formation pressure of the semiconductor layer ranges from 1 mTorr to 11 mTorr, or, a film formation temperature of the semiconductor layer is less than 600&#xb0; C., and a film formation pressure of the semiconductor layer is equal to or more than 2 mTorr and less than 5 mTorr. The sputtering method uses a sputtering gas having a volume ratio of a hydrogen gas of less than 0.1%, and the semiconductor layer satisfies a relationship of t&#x2264;0.881&#xd7;x, where t represents a thickness (nm) of the semiconductor layer, and x represents a ratio of the number of germanium atoms to a sum of the number of silicon atoms and the number of germanium atoms in the semiconductor layer.

A switching resistance RAM that is highly integrated as well as reduced in a read-out time is realized. There is formed an NPN type bipolar transistor BT composed of a collector layer made of an N-well, a base layer made of a P+ type Si layerA formed in a surface of the N-well, and an emitter layer made of an N+ type Si layerformed in a surface of the P+ type Si layerA. Also, there are formed a word line WLelectrically connected to the N+ type Si layerand bit lines BL-BLintersecting with the word line WL. Also, there are formed a plurality of switching layersformed on a surface of the P+ type Si layerA, each being electrically connected to corresponding each of the bit lines and switching between an ON state and an OFF state and an electric potential fixing lineA to fix the P+ type Si layerA at a predetermined electric potential.

Semiconductor memory device

There is offered a switching resistance RAM that is very much reduced in an occupied area and is highly integrated. Memory cells CEL-CELare formed corresponding to four intersections of word lines WLand WLand bit lines BLand BL. Each of the memory cells CEL-CELare composed of a switching layerformed on a surface of an N+ type Si layer. The switching layeris electrically connected to the bit line BLor BLthereabove through an electrode. The switching layeris composed of a SiC layerA stacked on the surface of the N+ type Si layerand a Si oxide layerB stacked on the SiC layerA. A top surface of the Si oxide layerB, that is the uppermost layer of the switching layer, is electrically connected to the corresponding bit line BLor BL

An ohmic electrode is formed on a cBN crystal to form a cBN semiconductor device which is used as a solid electronic element. The cBN semiconductor device may be of an n-type, a p-type or a pn junction type wherein molybdenum is deposited onto an n-type doped region of the cBN crystal or platinum is deposited onto a p-type doped region to thereby form an electrode with ohmic characteristic. The deposition of the molybdenum or the platinum is conducted by using a vapor deposition method followed by heating the attached substance at a temperature of 300.degree. C.-1100.degree. C. in an inactive gas atmosphere. The cBN semiconductor device can be used as a solid electronic element or an optoelectronic element for rectifiers, transistors, light emitting diodes and so on and integrated elements thereof.

Method of making cBN semiconductor device having an ohmic electrode

cBN semiconductor device having an ohmic electrode and a method of

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Koganei, Japan

Yoshiyuki Suda