Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Other

Yoshikazu Tsunemine

Tomonori Okudaira

Keiichiro Kashihara

Takeharu Kuroiwa

Tsuyoshi Horikawa

Tetsuro Makita

Noboru Mikami

Yasutoshi Okuno

Hiromi Itoh

Akie Yutani

A semiconductor device in which an electrode is not allowed to easily deform even when a heat treatment is performed on a material forming the electrode during a damascene process for forming a stacked capacitor, and a manufacturing method thereof are provided. A conductive filmmade of the same material as that of a capacitor lower electrodeis formed so as to be adhered to a top face of a conductive filmby a heat treatment. If the lower electrodeis made of a noble metal such as ruthenium, for example, the conductive filmis made of the same noble metal. Because of use of the same material for forming the conductive filmand the lower electrode, connection between the conductive filmand the lower electrodeis strengthened. Accordingly, it is easy to maintain connection between the conductive filmand the lower electrodeduring a heat treatment on the lower electrode, so that the lower electrode is not likely to deform. For this reason, connection between the conductive plugand the lower electrodecan be made more reliable than a structure in which the lower electrodeis connected directly to the conductive plug

Semiconductor device

A method for manufacturing a capacitor is provided which can form a lower electrode having a high aspect ratio without suffering deterioration of the capacitor electric characteristics even when a platinum-group metal is adopted as the material of the lower electrode and a metal oxide having a high dielectric constant is adopted as the material of the dielectric film. Holes ( ) that reach contact plugs ( ) are formed in an insulating film ( ). Then a dielectric film ( ) is formed on the surfaces of the holes ( ). Next the dielectric film ( ) on the bottoms of the holes ( ) are etched away to form holes ( ) reaching the contact plugs ( ). Lower electrodes ( ) are then formed to fill the holes ( ) and ( ).

Capacitor manufacturing method having dielectric formed before electrode

A conductive layer ( ) including polycrystalline silicon is provided on a second interlayer insulating film ( ). An opening (OP ) is defined in the conductive layer ( ). Thereafter utilizing electroplating, a conductive material ( ) serving as a capacitor lower electrode is formed in the opening (OP ). The conductive layer ( ) holds an insulating layer ( ) provided thereon, thus avoiding the conductive material ( ) from being deposited over the conductive layer ( ). Therefore, the conductive material can be formed with reliability in the opening. Further, it is possible to omit the steps of forming a redundant film and removing the same.

Providing a conductive material in an opening

A semiconductor device including a semiconductor substrate having a main surface, an insulating layer formed on the main surface of the semiconductor substrate, and lower electrode film embedded in the insulating layer. A dielectric film embedded in the insulating layer covers the lower electrode film. An upper electrode film is embedded in the insulating layer and is opposed to the lower electrode film through the dielectric film. A conductor plug electrically connects the lower electrode film and the semiconductor substrate with each other through a lower contact hole selectively formed in the insulating layer. A conductor layer is embedded in the insulating layer and is electrically connected to the upper electrode film on a first portion defining a part of the upper surface of the conductor layer. A wire arranged on the insulating layer is connected to a second portion defining another part, different from the first portion, of the upper surface of the conductor layer through an upper contact hole selectively formed in the insulating layer.

Semiconductor device with capacitor using high dielectric constant film or ferroelectric film

Provided are a method of manufacturing a stacked capacitor with which it is easy to fabricate even when a noble metal such as platinum is used for a lower electrode, and a stacked capacitor which can suppress a chemical reaction between a dielectric film or a sidewall lower electrode and a conductive plug. The method comprises the steps of: forming an insulating film ( ); forming a film to be etched on the insulating film ( ); forming a pattern for a lower electrode core ( A) which extends through the film to be etched and the insulating film ( ) and extends to part of a conductive plug ( ); burying a material for the lower electrode core ( A) into the pattern; burying a top insulating film ( A) and removing the film to be etched; depositing a material for a sidewall lower electrode ( A) and performing an etch back; and forming a dielectric film ( ) and upper electrode ( ). The occurrence of chemical reaction can be suppressed because the insulating film ( ) prevents the conductive plug ( ) from making contact with the dielectric film ( ) or the sidewall lower electrode ( A).

Stacked capacitor and method of manufacturing same

A conductive layer connecting structure has a barrier layer preventing mutual diffusion between silicon and platinum group elements even when they are heated to a high temperature. The conductive layer connecting structure includes a plug containing doped polycrystalline silicon, a barrier layer formed on the plug and containing titanium, silicon and nitrogen, and a lower electrode layer formed on the barrier layer and containing platinum.

Conductive layer connecting structure and method of manufacturing the same

A semiconductor device having a capacitor comprising an insulating layer 2 formed on a semiconductor substrate 1, a contact hole 9 disposed at a predetermined position on the insulating layer 2, a lower electrode 8 extending to the insulating layer 2 and electrically connected to the semiconductor substrate 1 through the contact hole, a dielectric film 10 formed to cover a surface of the lower electrode 8, an upper electrode 11 disposed on the dielectric film 10 so as to be opposite to the surface of the lower electrode 8 interposing the dielectric film, and a protection film 12 disposed adjacent to an end of a side surface of the lower electrode 8 for preventing the insulating layer 7 from being in contact with the dielectric film 10 at around the end, wherein the protection film is made of a material having a lattice constant same as or similar to that of the dielectric film 10, whereby it is possible to prevent deterioration of crystallization of the dielectric film to prevent a leak current in the capacitor from generating.

Semiconductor device having a capacitor with a high dielectric constant

A lower electrode layer 1 of a capacitor 10 is formed by sputtering performed at a temperature lower than 450.degree. C. in an atmosphere containing oxygen, and thereby the lower electrode layer 1 thus formed contains oxygen. Thereby, a method of manufacturing a semiconductor device having the capacitor can suppress current leak, and can prevent peeling of an electrode.

Semiconductor device having a capacitor

A thin film capacitor structure of a random access memory includes plurality of capacitors formed on an interlayer insulating film. The capacitor structure includes a plurality of lower electrodes formed on the interlayer insulating film, a first dielectric film formed over the plurality of lower electrodes and portions of the interlayer insulating film between lower electrodes, a second dielectric film formed on the first dielectric film, and an upper electrode formed on the second dielectric layer. A silicon oxide film is formed at the step portions of the first dielectric film which result at the periphery of the lower electrodes to prevent leakage current between adjacent capacitors.

Semiconductor capacitor

In a semiconductor memory device and a manufacturing method thereof, a barrier metal layer having a step h.sub.2 which is smaller than the step h.sub.1 at the upper end of a contact hole is formed on the surface opposite to the contact hole. The barrier metal layer has a nitrogen concentration gradient which becomes higher from its lower layer to its upper layer. A semiconductor memory device provided with a highly planer capacitor lower electrode, and a method of manufacturing the semiconductor memory device can thus be provided.

Method of manufacturing a semiconductor memory device with a high

In a thin film capacitor of a random access memory including a lower electrode, a dielectric film and an upper electrode, generation of defects in the dielectric film is suppressed. In another way, impurity diffusion into the dielectric film is prevented. In still another way, lattice matching of the dielectric film and the electrodes is realized. Thus, a reduced dielectric constant of the capacitor is prevented, and a quality of the semiconductor device is increased.

Growing community of inventors

Tokyo, Japan

Yoshikazu Tsunemine