Sumco Corporation

Mitsubishi Materials Silicon Corporation

Yoshihisa Nonogaki

Akihiko Endo

Yoshiro Aoki

Noashi Adachi

Hideo Tanaka

Yoshinobu Nakada

Hisashi Furuya

Hideki Nishihata

Tatsumi Kusaba

Etsurou Morita

Hidehiko Okuda

Takaaki Shiota

Jun Furukawa

Etsuro Morita

Hiroshi Koya

Yuji Nakata

A small amount of oxygen is ion-implanted in a wafer surface layer, and then heat treatment is performed so as to form an incomplete implanted oxide film in the surface layer. Thereby, wafer cost is reduced; a pit is prevented from forming in a surface of an epitaxial film; and a slip is prevented from forming in an external peripheral portion of a wafer.

Epitaxial wafer and production method thereof

The thickness of a semiconductor wafer layer, extending from a mirror-finished surface thereof to a solid-state image sensing device, is measured. Based on the residual thickness data, plasma etching is performed from the mirror-finished surface until a predetermined thickness is reached by controlling the plasma etching amount. By doing this, it is possible to reduce variation in the thickness of the solid-state image sensing device at low cost without causing an increase in the number of processes.

Method of controlling film thinning of semiconductor wafer for solid-state image sensing device

This method for heat-treating a silicon wafer includes: a step of subjecting a silicon wafer to a high-temperature heat treatment in an ambient gas atmosphere of hydrogen gas, argon gas or a mixture thereof; and a step of lowering a temperature at a rate of 2&#xb0; C./min or less in a nitrogen-gas-containing ambient atmosphere in a portion or all of a process of lowering a temperature to a wafer removal temperature following said high-temperature heat treatment. This silicon wafer has a defect-free layer which is formed by a high-temperature heat treatment and is included in a surface thereof, wherein an average iron concentration in said surface is 1&#xd7;10atoms/cmor less.

Method for heat-treating silicon wafer and silicon wafer

An ingot is manufactured by pulling it up such that V/Ga and V/Gb become 0.23 to 0.50 mm /minute &deg; C., respectively, where V (mm/minute) is a pulling-up speed, and Ga (&deg; C./mm) is and axial temperature gradient at the center of the ingot and Gb (&deg; C./mm) is an axial temperature gradient at the edge of the ingot at temperatures in a range of 1,300&deg; C. to a melting pointy of silicon. A wafer obtained by slicing the ingot is heat treated in a reductive atmosphere at temperature in a renge of 1,050&deg; C. to 1,220&deg; C. for 30 to 150 minutes. A silicon wafer free of OSF's, free of COP's, and substantially free of contamination such as Fe and of occurence of slip, is obtained.

Silicon wafer, and manufacturing method and heat treatment method of the same

Growing community of inventors

Tokyo, Japan

Yoshihisa Nonogaki