Sumitomo Metal Industries, Inc.

Tokyo Electron Limited

Ibiden Company Limited

Other

Tohoku University

Yozan Corporation

Yoshihiro Hirota

Toshiyuki Matsumoto

Muneo Harada

Tatsuo Hiroshima

Katsuya Okumura

Guoliang Shou

Takahiro Kitano

Toshio Nakanishi

Kazunori Motohashi

Tatsuo Nishita

Masayuki Kohno

Shuichi Kawano

Tomotaka Shinoda

Takaya Miyano

Koichi Nakano

Yoshiki Yamanishi

Tatsuzo Kawaguchi

Kinji Yamada

Makoto Yamamoto

Tetsuo Endoh

Yoshihiro Sato

Tatsuya Yamaguchi

Naoki Shindo

Akitaka Shimizu

Minoru Honda

Reiji Niino

Genji Nakamura

Masato Kushibiki

Masami Yakabe

Yusuke Muraki

Kenichi Oyama

Makoto Fujikawa

Yoshihiro Kato

Hajime Nakabayashi

Glenn W Gale

Shengmin Lin

Shigeo Ashigaki

Takahiko Ooasa

Kouichi Nakano

Rong Yang

Tomonari Yamamoto

Nobuo Okumura

There is provided a method of manufacturing a semiconductor device by processing a substrate, which includes: embedding a polymer having a urea bond in a recess formed in the substrate by supplying a material for polymerization from above a sacrificial film to the substrate and forming a polymer film made of the polymer having the urea bond, wherein a surface of the substrate is covered with the sacrificial film, the recess including an opening of the sacrificial film that is formed by a patterning; removing the polymer film formed on the sacrificial film while leaving the polymer embedded in the recess; removing the sacrificial film in a state in which the polymer is embedded in the recess; and subsequently, removing the polymer embedded in the recess.

Method of manufacturing semiconductor device

A phase change memory includes an insulating layer on a substrate, an electrode layer having one pole and an electrode layer having another pole within the insulating layer, an opening portion whose lower portion on an upper portion of the insulating layer is substantially square or substantially rectangular, a phase change portion formed substantially parallel to a surface of the substrate along the respective sides of the lower portion of the opening portion, and two connection electrodes having a pole and connected to the phase change portion at two opposing corners of the lower portion of the opening portion connecting a diode portion connected to the electrode layer having one pole and the phase change portion, and two connection electrodes having another pole and connected to the phase change portion at the other two opposing corners connecting the phase change portion and the electrode layer having another pole.

Phase change memory and method for fabricating phase change memory

A Plasma processing apparatus () introduces microwaves into a chamber () by a plane antenna () which has a plurality of holes. A material gas, which contains a nitrogen-containing compound and a silicon-containing compound, is introduced into the chamber () by using the plasma processing apparatus, and plasma is generated by the microwaves. Then, a silicon nitride film is deposited by the plasma on a surface of an object to be processed. The trap density of the silicon nitride film is controlled by adjusting the conditions of the plasma CVD process.

Method for forming silicon nitride film, method for manufacturing nonvolatile semiconductor memory device, nonvolatile semiconductor memory device and plasma apparatus

The invention provides a MOS semiconductor memory device that achieves excellent data retention characteristics while also achieving high-speed data write performance, low-power operation performance, and high reliability. A MOS semiconductor memory deviceincludes a first insulating filmand fifth insulating filmhaving large bandgapsand, a third insulating filmhaving the smallest bandgap, and a second insulating filmand fourth insulating filminterposed between the third insulating filmand the first and fifth insulating filmsand, respectively, and having intermediate bandgapsand

MOS semiconductor memory device having charge storage region formed from stack of insulating films

A capacitor having a high quality and a manufacturing method of the same are provided. A capacitor has a lower electrode formed on an oxide film, a dielectric layer formed on the lower electrode, an upper electrode formed so as to face the lower electrode with the dielectric layer between, and an upper electrode formed so as to cover the upper electrode, an opening portion of the upper electrode and an opening portion of the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to pattern the dielectric layer by using the upper electrode as a mask, and provide a capacitor having a high-quality dielectric layer by preventing impurity diffusion into the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to prevent the dielectric layer from being exposed to etching liquid, liquid developer, etc.

Capacitor and manufacturing method thereof

A plasma nitriding process is followed by a selective etching process which removes a silicon oxynitride film formed on surfaces of both an element separation film and an insulation film while leaving a silicon nitride film formed on an electrode layer. The selective etching process removes the silicon oxynitride film formed on the surfaces of the element separation film and the insulation film.

Semiconductor device manufacturing method

The present invention is a method of manufacturing a semiconductor device from a layered body including: a semiconductor substrate; a high dielectric film formed on the semiconductor substrate; and an SiC-based film formed on a position upper than the high dielectric film, the SiC-based film having an anti-reflective function and a hardmask function. The present invention comprises a plasma-processing step for plasma-processing the SiC-based film and the high dielectric film to modify the SiC-based film and the high dielectric film by an action of a plasma; and a cleaning step for wet-cleaning the SiC-based film and the high dielectric film modified in the plasma-processing step to collectively remove the SiC-based film and the high dielectric film.

Method for manufacturing semiconductor device

A dielectric film capacitor includes a lower electrode having an opening and formed of a material including platinum, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film. The planar area of the lower electrode is 50% or more of the area of a formation region of the dielectric film. A dielectric film capacitor includes a lower electrode formed of a material including platinum and having a thickness of 10 to 100 nm, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film.

Dielectric film capacitor and method of manufacturing the same

An electrostatic capacitance sensor, includes an electrostatic capacitance detector, an operational amplifier in which a feedback impedance circuit is connected between an output terminal and an inverse input terminal of the operational amplifier, a signal line connected between the inverse input terminal of the operational amplifier and the electrostatic capacitance detector, an alternating-current signal generator connected to a non-inverse input terminal of the operational amplifier, and a shield for shielding at least a portion of the signal line, the shield being connected to the non-inverse input terminal of the operational amplifier and the alternating-current signal generator. The electrostatic capacitance detector includes a detecting electrode and a shield electrode. The detecting electrode includes a detector-detecting electrode for detecting an object to be detected and an electrode introducer-detecting electrode for introducing an electrode to the detector-detecting electrode. The shield electrode is connected to the shield. At least a portion of the electrode introducer-detecting electrode is shielded by the shield electrode.

Electrostatic capacitance sensor, electrostatic capacitance sensor component, object mounting body and object mounting apparatus

A second operational amplifier ( ) of a core unit ( ) shorts an inverting input terminal and an output terminal. A signal line ( ) is connected to a non-inverting input terminal. A capacitive sensor ( ) is connected to the signal line ( ). A first operational amplifier ( ) earths the non-inverting input terminal. One end of a first resistance ( ) and one end of a second resistance ( ) are respectively connected to the inverting input terminal. The other end of the first resistance ( ) is connected to an alternate current voltage generator ( ). The other end of the second resistance ( ) is connected to the output terminal of the first operational amplifier ( ). A signal output terminal ( ) of the core unit ( ) is connected to an inverting amplification device ( ). An alternate output terminal ( ) of the core unit ( ) and an inverting output terminal ( ) of the inverting amplification device ( ) are connected to an addition device ( ). The non-inverting input terminal of operational amplifiers ( ) and ( ).

Impedance detection circuit, impedance detection device, and impedance detection method

An apparatus for detecting an impedance variable in response to a sensed physical amount of a sensor is provided which comprises an impedance-frequency conversion unit and a counter. The impedance-frequency conversion unit converts the sensor impedance to an oscillation signal a frequency of which corresponds to the sensor impedance. The impedance-frequency conversion unit comprises an impedance-voltage converter for providing a voltage corresponding to the sensor impedance, and a Wien bridge oscillator including an element an impedance of which varies in response to the voltage from the impedance-voltage converter, for generating the oscillation signal. The Wien bridge oscillator is capable of generating a square wave signal as the oscillation signal. The counter counts the number of waves (or wave number) of the oscillation signal in a predetermined time period to output a count value which can be handled as a digital signal.

Impedance detection apparatus and method of physical variable

There is provided a probing and measurement system for measuring a capacitance value of a capacitance to be measured, by removing any influence made by a parasitic capacitance and a fluctuation thereof within a shield box . The probing and measurement system comprises a prober , a signal line having one end to be in contact with a sample to be measured, a shield line surrounding the signal line, and a capacitance measurement circuit . The capacitance measurement circuit comprises an operational amplifier having an inverting input terminal connected to the other end of the signal line and a non-inverting input terminal connected to the shield line, wherein an imaginary short state exists between the inverting input terminal and the non-inverting input terminal, and wherein a signal having a value corresponding to an electrostatic capacitance of the sample to be measured is outputted when an AC signal is applied to the non-inverting input terminal. Conductive portions of the shield box , conductive portions of a stand , a surface of the stand which contacts with the sample to be measured, and the shield line are placed at the same electric potential.

Microscopic capacitance measurement system and probing system

A impedance-to-voltage converter for converting an impedance of a target to a voltage is described which comprises an operational amplifier (OP), a coaxial cable consisting a signal line and shielding element(s), and an AC signal generator. A feedback impedance circuit is connected between output and inverting terminals of the OP, and whereby a non-inverting terminal and the inverting terminal are an imaginal-short condition. One end of the signal line is connected to the inverting input terminal of the OP and the other end is connected to one electrode of the target and the AC signal generator is connected to the non-inverting input terminal of the OP. The shielding element comprises at least one shielding layer surrounding the signal line and is connected to the non-inverting input terminal of the OP, and thus the signal line and the shielding layer are the same voltage due to the imaginal-short of the input terminals of the OP, resulting in reduction of noise on the signal line.

Impedance-to-voltage converter

A static capacitance-to-voltage converter is capable of converting a static capacitance into a voltage without suffering from a stray capacitance formed between a signal and a shielding line or a stray capacitance formed between an exposed portion of the signal line and its surroundings. The static capacitance-to-voltage converter is formed of an operational amplifier placed in an imaginary short-circuit state between an inverting input and a non-inverting input thereof; a signal line having one end connected to the inverting input and the other end capable of being connected to a static capacitance; a shielding line surrounding the signal line and connected to the non-inverting input; an alternating current signal generator for applying the non-inverting input with an alternating current signal; and zero adjusters for adjusting the output of the static capacitance-to-voltage converter to minimum when no static capacitance is connected to the signal line.

Static capacitance-to-voltage converter and converting method

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Kyoto, Japan

Yoshihiro Hirota